gem5 [DEVELOP-FOR-25.0]
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Public Member Functions | Private Attributes | List of all members
gem5::ArmISA::HardwareBreakpoint Class Reference

#include <faults.hh>

Inheritance diagram for gem5::ArmISA::HardwareBreakpoint:
gem5::ArmISA::ArmFaultVals< HardwareBreakpoint > gem5::ArmISA::ArmFault gem5::FaultBase

Public Member Functions

void invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
 
 HardwareBreakpoint (Addr _vaddr, uint32_t _iss)
 
bool routeToHyp (ThreadContext *tc) const override
 
ExceptionClass ec (ThreadContext *tc) const override
 Syndrome methods.
 
bool il (ThreadContext *tc) const override
 
- Public Member Functions inherited from gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >
 ArmFaultVals (ExtMachInst mach_inst=0, uint32_t _iss=0)
 
FaultName name () const override
 
FaultOffset offset (ThreadContext *tc) override
 
FaultOffset offset64 (ThreadContext *tc) override
 
OperatingMode nextMode () override
 
virtual bool routeToMonitor (ThreadContext *tc) const override
 
uint8_t armPcOffset (bool is_hyp) override
 
uint8_t thumbPcOffset (bool is_hyp) override
 
uint8_t armPcElrOffset () override
 
uint8_t thumbPcElrOffset () override
 
bool abortDisable (ThreadContext *tc) override
 
bool fiqDisable (ThreadContext *tc) override
 
uint32_t iss () const override
 
- Public Member Functions inherited from gem5::ArmISA::ArmFault
 ArmFault (ExtMachInst mach_inst=0, uint32_t _iss=0)
 
MiscRegIndex getSyndromeReg64 () const
 
void invoke32 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
 
void invoke64 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
 
virtual void update (ThreadContext *tc)
 
bool isResetSPSR ()
 
bool vectorCatch (ThreadContext *tc, const StaticInstPtr &inst)
 
ArmStaticInst * instrAnnotate (const StaticInstPtr &inst)
 
virtual void annotate (AnnotationIDs id, uint64_t val)
 
virtual uint32_t vectorCatchFlag () const
 
virtual bool isStage2 () const
 
virtual FSR getFsr (ThreadContext *tc) const
 
virtual void setSyndrome (ThreadContext *tc, MiscRegIndex syndrome_reg)
 
virtual bool getFaultVAddr (Addr &va) const
 
OperatingMode getToMode () const
 
virtual bool isExternalAbort () const
 
- Public Member Functions inherited from gem5::FaultBase
virtual ~FaultBase ()
 

Private Attributes

Addr vAddr
 

Additional Inherited Members

- Public Types inherited from gem5::ArmISA::ArmFault
enum  FaultSource {
  AlignmentFault = 0 , InstructionCacheMaintenance , SynchExtAbtOnTranslTableWalkLL , SynchPtyErrOnTranslTableWalkLL = SynchExtAbtOnTranslTableWalkLL + 4 ,
  TranslationLL = SynchPtyErrOnTranslTableWalkLL + 4 , AccessFlagLL = TranslationLL + 4 , DomainLL = AccessFlagLL + 4 , PermissionLL = DomainLL + 4 ,
  DebugEvent = PermissionLL + 4 , SynchronousExternalAbort , TLBConflictAbort , SynchPtyErrOnMemoryAccess ,
  AsynchronousExternalAbort , AsynchPtyErrOnMemoryAccess , AddressSizeLL , PrefetchTLBMiss = AddressSizeLL + 4 ,
  PrefetchUncacheable , NumFaultSources , FaultSourceInvalid = 0xff
}
 Generic fault source enums used to index into {short/long/aarch64}DescFaultSources[] to get the actual encodings based on the current register width state and the translation table format in use. More...
 
enum  AnnotationIDs {
  S1PTW , OVA , SAS , SSE ,
  SRT , CM , OFA , WnR ,
  SF , AR
}
 
enum  DebugType {
  NODEBUG = 0 , BRKPOINT , VECTORCATCH , WPOINT_CM ,
  WPOINT_NOCM
}
 
- Static Public Attributes inherited from gem5::ArmISA::ArmFault
static uint8_t shortDescFaultSources [NumFaultSources]
 Encodings of the fault sources when the short-desc.
 
static uint8_t longDescFaultSources [NumFaultSources]
 Encodings of the fault sources when the long-desc.
 
static uint8_t aarch64FaultSources [NumFaultSources]
 Encodings of the fault sources in AArch64 state.
 
- Protected Member Functions inherited from gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
- Protected Member Functions inherited from gem5::ArmISA::ArmFault
virtual Addr getVector (ThreadContext *tc)
 
Addr getVector64 (ThreadContext *tc)
 
- Protected Attributes inherited from gem5::ArmISA::ArmFault
ExtMachInst machInst
 
uint32_t issRaw
 
bool bStep
 
bool from64
 
bool to64
 
ExceptionLevel fromEL
 
ExceptionLevel toEL
 
OperatingMode fromMode
 
OperatingMode toMode
 
bool faultUpdated
 
bool hypRouted
 
bool span
 
- Static Protected Attributes inherited from gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >
static FaultVals vals
 

Detailed Description

Definition at line 674 of file faults.hh.

Constructor & Destructor Documentation

◆ HardwareBreakpoint()

gem5::ArmISA::HardwareBreakpoint::HardwareBreakpoint ( Addr _vaddr,
uint32_t _iss )

Definition at line 1600 of file faults.cc.

References gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >::ArmFaultVals(), HardwareBreakpoint(), vAddr, and gem5::MipsISA::vaddr.

Referenced by HardwareBreakpoint().

Member Function Documentation

◆ ec()

ExceptionClass gem5::ArmISA::HardwareBreakpoint::ec ( ThreadContext * tc) const
overridevirtual

Syndrome methods.

Reimplemented from gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >.

Definition at line 1614 of file faults.cc.

References gem5::ArmISA::ArmFault::fromEL, gem5::ArmISA::HW_BREAKPOINT_CURR_EL, gem5::ArmISA::HW_BREAKPOINT_LOWER_EL, and gem5::ArmISA::ArmFault::toEL.

◆ il()

bool gem5::ArmISA::HardwareBreakpoint::il ( ThreadContext * tc) const
inlineoverridevirtual

Reimplemented from gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >.

Definition at line 686 of file faults.hh.

◆ invoke()

void gem5::ArmISA::HardwareBreakpoint::invoke ( ThreadContext * tc,
const StaticInstPtr & inst = nullStaticInstPtr )
overridevirtual

Reimplemented from gem5::ArmISA::ArmFault.

Definition at line 1624 of file faults.cc.

References gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmSystem::haveEL(), gem5::ArmISA::ArmFault::invoke(), gem5::ArmISA::MISCREG_ELR_EL1, gem5::ArmISA::MISCREG_ELR_EL2, gem5::ArmISA::MISCREG_ELR_EL3, panic, gem5::ThreadContext::setMiscReg(), gem5::ArmISA::ArmFault::toEL, and vAddr.

◆ routeToHyp()

bool gem5::ArmISA::HardwareBreakpoint::routeToHyp ( ThreadContext * tc) const
overridevirtual

Reimplemented from gem5::ArmISA::ArmFault.

Definition at line 1605 of file faults.cc.

References gem5::ArmISA::EL1, gem5::ArmISA::EL2Enabled(), gem5::ArmISA::ArmFault::fromEL, gem5::ArmISA::MISCREG_HCR_EL2, gem5::ArmISA::MISCREG_MDCR_EL2, and gem5::ThreadContext::readMiscRegNoEffect().

Member Data Documentation

◆ vAddr

Addr gem5::ArmISA::HardwareBreakpoint::vAddr
private

Definition at line 677 of file faults.hh.

Referenced by HardwareBreakpoint(), and invoke().

The documentation for this class was generated from the following files:
Generated on Mon May 26 2025 09:19:28 for gem5 by doxygen 1.13.2