gem5 [DEVELOP-FOR-25.0]
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Public Member Functions | Static Public Attributes | List of all members
gem5::ArmISA::PrefetchAbort Class Reference

#include <faults.hh>

Inheritance diagram for gem5::ArmISA::PrefetchAbort:
gem5::ArmISA::AbortFault< PrefetchAbort > gem5::ArmISA::ArmFaultVals< PrefetchAbort > gem5::ArmISA::ArmFault gem5::FaultBase

Public Member Functions

 PrefetchAbort (Addr _addr, uint8_t _source, bool _stage2=false, TranMethod _tran_method=TranMethod::UnknownTran, ArmFault::DebugType _debug=ArmFault::NODEBUG)
 
bool routeToMonitor (ThreadContext *tc) const override
 
bool routeToHyp (ThreadContext *tc) const override
 
uint32_t vectorCatchFlag () const override
 
ExceptionClass ec (ThreadContext *tc) const override
 Syndrome methods.
 
bool il (ThreadContext *tc) const override
 
uint32_t iss () const override
 
- Public Member Functions inherited from gem5::ArmISA::AbortFault< PrefetchAbort >
 AbortFault (Addr _faultAddr, bool _write, DomainType _domain, uint8_t _source, bool _stage2, TranMethod _tranMethod=TranMethod::UnknownTran, ArmFault::DebugType _debug=ArmFault::NODEBUG)
 
bool getFaultVAddr (Addr &va) const override
 
void invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
 
void update (ThreadContext *tc) override
 
FSR getFsr (ThreadContext *tc) const override
 
uint8_t getFaultStatusCode (ThreadContext *tc) const
 
bool abortDisable (ThreadContext *tc) override
 
bool isStage2 () const override
 
void annotate (ArmFault::AnnotationIDs id, uint64_t val) override
 
void setSyndrome (ThreadContext *tc, MiscRegIndex syndrome_reg) override
 
bool isMMUFault () const
 
bool isExternalAbort () const override
 
- Public Member Functions inherited from gem5::ArmISA::ArmFaultVals< PrefetchAbort >
 ArmFaultVals (ExtMachInst mach_inst=0, uint32_t _iss=0)
 
FaultName name () const override
 
FaultOffset offset (ThreadContext *tc) override
 
FaultOffset offset64 (ThreadContext *tc) override
 
OperatingMode nextMode () override
 
uint8_t armPcOffset (bool is_hyp) override
 
uint8_t thumbPcOffset (bool is_hyp) override
 
uint8_t armPcElrOffset () override
 
uint8_t thumbPcElrOffset () override
 
bool abortDisable (ThreadContext *tc) override
 
bool fiqDisable (ThreadContext *tc) override
 
- Public Member Functions inherited from gem5::ArmISA::ArmFault
 ArmFault (ExtMachInst mach_inst=0, uint32_t _iss=0)
 
MiscRegIndex getSyndromeReg64 () const
 
void invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
 
void invoke32 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
 
void invoke64 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
 
bool isResetSPSR ()
 
bool vectorCatch (ThreadContext *tc, const StaticInstPtr &inst)
 
ArmStaticInst * instrAnnotate (const StaticInstPtr &inst)
 
OperatingMode getToMode () const
 
- Public Member Functions inherited from gem5::FaultBase
virtual ~FaultBase ()
 

Static Public Attributes

static const MiscRegIndex FsrIndex = MISCREG_IFSR
 
static const MiscRegIndex FarIndex = MISCREG_IFAR
 
static const MiscRegIndex HFarIndex = MISCREG_HIFAR
 
- Static Public Attributes inherited from gem5::ArmISA::ArmFault
static uint8_t shortDescFaultSources [NumFaultSources]
 Encodings of the fault sources when the short-desc.
 
static uint8_t longDescFaultSources [NumFaultSources]
 Encodings of the fault sources when the long-desc.
 
static uint8_t aarch64FaultSources [NumFaultSources]
 Encodings of the fault sources in AArch64 state.
 

Additional Inherited Members

- Public Types inherited from gem5::ArmISA::ArmFault
enum  FaultSource {
  AlignmentFault = 0 , InstructionCacheMaintenance , SynchExtAbtOnTranslTableWalkLL , SynchPtyErrOnTranslTableWalkLL = SynchExtAbtOnTranslTableWalkLL + 4 ,
  TranslationLL = SynchPtyErrOnTranslTableWalkLL + 4 , AccessFlagLL = TranslationLL + 4 , DomainLL = AccessFlagLL + 4 , PermissionLL = DomainLL + 4 ,
  DebugEvent = PermissionLL + 4 , SynchronousExternalAbort , TLBConflictAbort , SynchPtyErrOnMemoryAccess ,
  AsynchronousExternalAbort , AsynchPtyErrOnMemoryAccess , AddressSizeLL , PrefetchTLBMiss = AddressSizeLL + 4 ,
  PrefetchUncacheable , NumFaultSources , FaultSourceInvalid = 0xff
}
 Generic fault source enums used to index into {short/long/aarch64}DescFaultSources[] to get the actual encodings based on the current register width state and the translation table format in use. More...
 
enum  AnnotationIDs {
  S1PTW , OVA , SAS , SSE ,
  SRT , CM , OFA , WnR ,
  SF , AR
}
 
enum  DebugType {
  NODEBUG = 0 , BRKPOINT , VECTORCATCH , WPOINT_CM ,
  WPOINT_NOCM
}
 
- Protected Member Functions inherited from gem5::ArmISA::ArmFaultVals< PrefetchAbort >
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
ArmFault::FaultVals vals
 
- Protected Member Functions inherited from gem5::ArmISA::ArmFault
virtual Addr getVector (ThreadContext *tc)
 
Addr getVector64 (ThreadContext *tc)
 
- Protected Attributes inherited from gem5::ArmISA::AbortFault< PrefetchAbort >
Addr faultAddr
 The virtual address the fault occured at.
 
Addr OVAddr
 Original virtual address.
 
bool write
 
DomainType domain
 
uint8_t source
 
uint8_t srcEncoded
 
bool stage2
 
bool s1ptw
 
TranMethod tranMethod
 
ArmFault::DebugType debugType
 
- Protected Attributes inherited from gem5::ArmISA::ArmFault
ExtMachInst machInst
 
uint32_t issRaw
 
bool bStep
 
bool from64
 
bool to64
 
ExceptionLevel fromEL
 
ExceptionLevel toEL
 
OperatingMode fromMode
 
OperatingMode toMode
 
bool faultUpdated
 
bool hypRouted
 
bool span
 
- Static Protected Attributes inherited from gem5::ArmISA::ArmFaultVals< PrefetchAbort >
static FaultVals vals
 

Detailed Description

Definition at line 513 of file faults.hh.

Constructor & Destructor Documentation

◆ PrefetchAbort()

gem5::ArmISA::PrefetchAbort::PrefetchAbort ( Addr _addr,
uint8_t _source,
bool _stage2 = false,
TranMethod _tran_method = TranMethod::UnknownTran,
ArmFault::DebugType _debug = ArmFault::NODEBUG )
inline

Definition at line 520 of file faults.hh.

References gem5::ArmISA::AbortFault< PrefetchAbort >::AbortFault(), gem5::ArmISA::NoAccess, gem5::ArmISA::ArmFault::NODEBUG, PrefetchAbort(), and gem5::ArmISA::UnknownTran.

Referenced by PrefetchAbort().

Member Function Documentation

◆ ec()

ExceptionClass gem5::ArmISA::PrefetchAbort::ec ( ThreadContext * tc) const
overridevirtual

Syndrome methods.

Reimplemented from gem5::ArmISA::ArmFaultVals< PrefetchAbort >.

Definition at line 1249 of file faults.cc.

References ec(), gem5::ArmISA::ArmFault::fromEL, gem5::ArmISA::MISCREG_SPSR_HYP, gem5::ArmISA::MODE_HYP, gem5::ArmISA::PREFETCH_ABORT_CURR_EL, gem5::ArmISA::PREFETCH_ABORT_LOWER_EL, gem5::ThreadContext::readMiscReg(), gem5::ArmISA::ArmFault::to64, gem5::ArmISA::ArmFault::toEL, and gem5::ArmISA::ArmFaultVals< T >::vals.

Referenced by ec().

◆ il()

bool gem5::ArmISA::PrefetchAbort::il ( ThreadContext * tc) const
inlineoverridevirtual

Reimplemented from gem5::ArmISA::ArmFaultVals< PrefetchAbort >.

Definition at line 534 of file faults.hh.

◆ iss()

uint32_t gem5::ArmISA::PrefetchAbort::iss ( ) const
overridevirtual

Reimplemented from gem5::ArmISA::ArmFaultVals< PrefetchAbort >.

Definition at line 1274 of file faults.cc.

References iss(), gem5::ArmISA::AbortFault< PrefetchAbort >::s1ptw, and gem5::ArmISA::AbortFault< PrefetchAbort >::srcEncoded.

Referenced by iss().

◆ routeToHyp()

bool gem5::ArmISA::PrefetchAbort::routeToHyp ( ThreadContext * tc) const
overridevirtual

Reimplemented from gem5::ArmISA::ArmFault.

Definition at line 1293 of file faults.cc.

References gem5::ArmISA::currEL(), gem5::ArmISA::ArmFault::DebugEvent, gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::ArmFault::fromEL, gem5::ArmSystem::haveEL(), gem5::ArmISA::isSecure(), gem5::ArmISA::MISCREG_HCR_EL2, gem5::ArmISA::MISCREG_HDCR, gem5::ThreadContext::readMiscRegNoEffect(), gem5::ArmISA::AbortFault< PrefetchAbort >::source, and gem5::ArmISA::AbortFault< PrefetchAbort >::stage2.

◆ routeToMonitor()

bool gem5::ArmISA::PrefetchAbort::routeToMonitor ( ThreadContext * tc) const
overridevirtual

Reimplemented from gem5::ArmISA::ArmFaultVals< PrefetchAbort >.

Definition at line 1286 of file faults.cc.

References gem5::ArmISA::AbortFault< PrefetchAbort >::isMMUFault(), gem5::ArmISA::MISCREG_SCR_EL3, and gem5::ThreadContext::readMiscRegNoEffect().

◆ vectorCatchFlag()

uint32_t gem5::ArmISA::PrefetchAbort::vectorCatchFlag ( ) const
inlineoverridevirtual

Reimplemented from gem5::ArmISA::ArmFault.

Definition at line 530 of file faults.hh.

Member Data Documentation

◆ FarIndex

const MiscRegIndex gem5::ArmISA::PrefetchAbort::FarIndex = MISCREG_IFAR
static

Definition at line 517 of file faults.hh.

◆ FsrIndex

const MiscRegIndex gem5::ArmISA::PrefetchAbort::FsrIndex = MISCREG_IFSR
static

Definition at line 516 of file faults.hh.

◆ HFarIndex

const MiscRegIndex gem5::ArmISA::PrefetchAbort::HFarIndex = MISCREG_HIFAR
static

Definition at line 518 of file faults.hh.

The documentation for this class was generated from the following files:
Generated on Mon May 26 2025 09:19:29 for gem5 by doxygen 1.13.2