#include <global_memory_pipeline.hh>

Classes
struct	GlobalMemPipelineStats

Public Member Functions
	GlobalMemPipeline (const ComputeUnitParams &p, ComputeUnit &cu)

void	init ()

void	exec ()

GPUDynInstPtr	getNextReadyResp ()
	Find the next ready response to service.

void	completeRequest (GPUDynInstPtr gpuDynInst)
	once a memory request is finished we remove it from the buffer.

void	issueRequest (GPUDynInstPtr gpuDynInst)
	Issues a request to the pipeline (i.e., enqueue it in the request buffer).

void	handleResponse (GPUDynInstPtr gpuDynInst)
	This method handles responses sent to this GM pipeline by the CU.

bool	isGMReqFIFOWrRdy (uint32_t pendReqs=0) const

const std::string &	name () const

void	incLoadVRFBankConflictCycles (int num_cycles)

bool	coalescerReady (GPUDynInstPtr mp) const

bool	outstandingReqsCheck (GPUDynInstPtr mp) const

void	acqCoalescerToken (GPUDynInstPtr mp)

void	printProgress ()

Protected Attributes
gem5::GlobalMemPipeline::GlobalMemPipelineStats	stats

Private Attributes
ComputeUnit &	computeUnit

const std::string	_name

int	gmQueueSize

int	maxWaveRequests

int	inflightStores

int	inflightLoads

int	globalMemSize

std::map< uint64_t, std::pair< GPUDynInstPtr, bool > >	gmOrderedRespBuffer

std::queue< GPUDynInstPtr >	gmIssuedRequests

Detailed Description

Definition at line 59 of file global_memory_pipeline.hh.

Constructor & Destructor Documentation

◆ GlobalMemPipeline()

gem5::GlobalMemPipeline::GlobalMemPipeline	(	const ComputeUnitParams &	p,
		ComputeUnit &	cu )

Definition at line 47 of file global_memory_pipeline.cc.

References _name, computeUnit, gmQueueSize, inflightLoads, inflightStores, maxWaveRequests, name(), gem5::MipsISA::p, and stats.

Member Function Documentation

◆ acqCoalescerToken()

void gem5::GlobalMemPipeline::acqCoalescerToken ( GPUDynInstPtr mp )

Definition at line 86 of file global_memory_pipeline.cc.

References DPRINTF, and gem5::ArmISA::mp.

◆ coalescerReady()

bool gem5::GlobalMemPipeline::coalescerReady ( GPUDynInstPtr mp ) const

Definition at line 63 of file global_memory_pipeline.cc.

References DPRINTF, and gem5::ArmISA::mp.

◆ completeRequest()

void gem5::GlobalMemPipeline::completeRequest ( GPUDynInstPtr gpuDynInst )

once a memory request is finished we remove it from the buffer.

Definition at line 261 of file global_memory_pipeline.cc.

References gmOrderedRespBuffer, inflightLoads, and inflightStores.

Referenced by exec().

◆ exec()

void gem5::GlobalMemPipeline::exec ( )

if we are not in out-of-order data delivery mode then we keep the responses sorted in program order. in order to do so we must reserve an entry in the resp buffer before we issue the request to the mem system. mem fence requests will not be stored here because once they are issued from the GM pipeline, they do not send any response back to it.

Memory accesses instructions that do not generate any memory requests (such as out-of-bounds buffer acceses where all lanes are out of bounds) will not trigger a callback to complete the request, so we need to mark it as completed as soon as it is issued. Note this this will still insert an entry in the ordered return FIFO such that waitcnt is still resolved correctly.

Definition at line 111 of file global_memory_pipeline.cc.

References gem5::Complete, completeRequest(), computeUnit, gem5::curTick(), DPRINTF, getNextReadyResp(), gmIssuedRequests, gmOrderedRespBuffer, gmQueueSize, handleResponse(), inflightLoads, inflightStores, gem5::ArmISA::m, gem5::ArmISA::mp, and gem5::MipsISA::w.

◆ getNextReadyResp()

GPUDynInstPtr gem5::GlobalMemPipeline::getNextReadyResp ( )

Find the next ready response to service.

In order to ensure that no waitcnts are violated, we pop the oldest (in program order) response, and only if it is marked as done. This is because waitcnt values expect memory operations to complete and decrement their counter values in program order.

Definition at line 247 of file global_memory_pipeline.cc.

References gmOrderedRespBuffer.

Referenced by exec().