gem5::SparcISA::FastInstructionAccessMMUMiss Class Reference

#include <faults.hh>

Inheritance diagram for gem5::SparcISA::FastInstructionAccessMMUMiss:

Public Member Functions
	FastInstructionAccessMMUMiss (Addr addr)
	FastInstructionAccessMMUMiss ()
void	invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
Public Member Functions inherited from gem5::SparcISA::SparcFault< FastInstructionAccessMMUMiss >
FaultName	name () const
TrapType	trapType ()
FaultPriority	priority ()
PrivilegeLevel	getNextLevel (PrivilegeLevel current)
Public Member Functions inherited from gem5::SparcISA::SparcFaultBase
void	invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
Public Member Functions inherited from gem5::FaultBase
virtual	~FaultBase ()

Protected Attributes
Addr	vaddr

Additional Inherited Members
Public Types inherited from gem5::SparcISA::SparcFaultBase
enum	PrivilegeLevel {   U , User = U , P , Privileged = P ,   H , Hyperprivileged = H , NumLevels , SH = -1 ,   ShouldntHappen = SH }
using	PrivilegeLevelSpec = std::array<PrivilegeLevel, NumLevels>
Protected Member Functions inherited from gem5::SparcISA::SparcFault< FastInstructionAccessMMUMiss >
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
SparcFaultBase::FaultVals	vals
Static Protected Attributes inherited from gem5::SparcISA::SparcFault< FastInstructionAccessMMUMiss >
static FaultVals	vals

Detailed Description

Definition at line 205 of file faults.hh.

Constructor & Destructor Documentation

FastInstructionAccessMMUMiss() [1/2]

gem5::SparcISA::FastInstructionAccessMMUMiss::FastInstructionAccessMMUMiss ( Addr addr )

inline

Definition at line 211 of file faults.hh.

References gem5::X86ISA::addr, and vaddr.

FastInstructionAccessMMUMiss() [2/2]

gem5::SparcISA::FastInstructionAccessMMUMiss::FastInstructionAccessMMUMiss ( )

inline

Definition at line 213 of file faults.hh.

References vaddr.

Member Function Documentation

invoke()

void gem5::SparcISA::FastInstructionAccessMMUMiss::invoke ( ThreadContext * tc, const StaticInstPtr & inst = nullStaticInstPtr )

virtual

Reimplemented from gem5::FaultBase.

Definition at line 620 of file faults.cc.

References gem5::bits(), gem5::EmulationPageTable::Entry::flags, gem5::FullSystem, gem5::ThreadContext::getMMUPtr(), gem5::ThreadContext::getProcessPtr(), gem5::SparcISA::MMU::insertItlbEntry(), gem5::SparcISA::SparcFaultBase::invoke(), gem5::SparcISA::MISCREG_TLB_DATA, gem5::MipsISA::p, gem5::EmulationPageTable::Entry::paddr, panic_if, gem5::SparcISA::TlbEntry::pte, gem5::ThreadContext::readMiscRegNoEffect(), gem5::EmulationPageTable::ReadOnly, gem5::EmulationPageTable::Uncacheable, and vaddr.

Member Data Documentation

vaddr

Addr gem5::SparcISA::FastInstructionAccessMMUMiss::vaddr

protected

Definition at line 209 of file faults.hh.

Referenced by FastInstructionAccessMMUMiss(), FastInstructionAccessMMUMiss(), and invoke().

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The documentation for this class was generated from the following files:

• arch/sparc/faults.hh
• arch/sparc/faults.cc