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gem5 [DEVELOP-FOR-25.0]
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#include <op_encodings.hh>
Public Member Functions | |
| Inst_SOPK (InFmt_SOPK *, const std::string &opcode) | |
| ~Inst_SOPK () | |
| int | instSize () const override |
| void | generateDisassembly () override |
| void | initOperandInfo () override |
Public Member Functions inherited from gem5::VegaISA::VEGAGPUStaticInst | |
| VEGAGPUStaticInst (const std::string &opcode) | |
| ~VEGAGPUStaticInst () | |
| void | generateDisassembly () override |
| bool | isFlatScratchRegister (int opIdx) override |
| bool | isExecMaskRegister (int opIdx) override |
| void | initOperandInfo () override |
| int | getOperandSize (int opIdx) override |
| int | coalescerTokenCount () const override |
| Return the number of tokens needed by the coalescer. | |
| ScalarRegU32 | srcLiteral () const override |
Public Member Functions inherited from gem5::GPUStaticInst | |
| GPUStaticInst (const std::string &opcode) | |
| virtual | ~GPUStaticInst () |
| void | instAddr (int inst_addr) |
| int | instAddr () const |
| int | nextInstAddr () const |
| void | instNum (int num) |
| int | instNum () |
| void | ipdInstNum (int num) |
| int | ipdInstNum () const |
| void | initDynOperandInfo (Wavefront *wf, ComputeUnit *cu) |
| virtual void | execute (GPUDynInstPtr gpuDynInst)=0 |
| const std::string & | disassemble () |
| virtual int | getNumOperands ()=0 |
| virtual int | numDstRegOperands ()=0 |
| virtual int | numSrcRegOperands ()=0 |
| int | numSrcVecOperands () |
| int | numDstVecOperands () |
| int | numSrcVecDWords () |
| int | numDstVecDWords () |
| int | numSrcScalarOperands () |
| int | numDstScalarOperands () |
| int | numSrcScalarDWords () |
| int | numDstScalarDWords () |
| int | maxOperandSize () |
| bool | isALU () const |
| bool | isBranch () const |
| bool | isCondBranch () const |
| bool | isNop () const |
| bool | isReturn () const |
| bool | isEndOfKernel () const |
| bool | isKernelLaunch () const |
| bool | isSDWAInst () const |
| bool | isDPPInst () const |
| bool | isUnconditionalJump () const |
| bool | isSpecialOp () const |
| bool | isWaitcnt () const |
| bool | isSleep () const |
| bool | isBarrier () const |
| bool | isMemSync () const |
| bool | isMemRef () const |
| bool | isFlat () const |
| bool | isFlatGlobal () const |
| bool | isFlatScratch () const |
| bool | isLoad () const |
| bool | isStore () const |
| bool | isAtomic () const |
| bool | isAtomicNoRet () const |
| bool | isAtomicRet () const |
| bool | isScalar () const |
| bool | readsSCC () const |
| bool | writesSCC () const |
| bool | readsVCC () const |
| bool | writesVCC () const |
| bool | readsEXEC () const |
| bool | writesEXEC () const |
| bool | readsMode () const |
| bool | writesMode () const |
| bool | ignoreExec () const |
| bool | isAtomicAnd () const |
| bool | isAtomicOr () const |
| bool | isAtomicXor () const |
| bool | isAtomicCAS () const |
| bool | isAtomicExch () const |
| bool | isAtomicAdd () const |
| bool | isAtomicSub () const |
| bool | isAtomicInc () const |
| bool | isAtomicDec () const |
| bool | isAtomicMax () const |
| bool | isAtomicMin () const |
| bool | isArgLoad () const |
| bool | isGlobalMem () const |
| bool | isLocalMem () const |
| bool | isArgSeg () const |
| bool | isGlobalSeg () const |
| bool | isGroupSeg () const |
| bool | isKernArgSeg () const |
| bool | isPrivateSeg () const |
| bool | isReadOnlySeg () const |
| bool | isSpillSeg () const |
| bool | isGloballyCoherent () const |
| Coherence domain of a memory instruction. | |
| bool | isSystemCoherent () const |
| bool | isI8 () const |
| bool | isF16 () const |
| bool | isF32 () const |
| bool | isF64 () const |
| bool | isFMA () const |
| bool | isMAC () const |
| bool | isMAD () const |
| bool | isMFMA () const |
| bool | hasNoAddr () const |
| virtual void | initiateAcc (GPUDynInstPtr gpuDynInst) |
| virtual void | completeAcc (GPUDynInstPtr gpuDynInst) |
| virtual uint32_t | getTargetPc () |
| void | setFlag (Flags flag) |
| const std::string & | opcode () const |
| const std::vector< OperandInfo > & | srcOperands () const |
| const std::vector< OperandInfo > & | dstOperands () const |
| const std::vector< OperandInfo > & | srcVecRegOperands () const |
| const std::vector< OperandInfo > & | dstVecRegOperands () const |
| const std::vector< OperandInfo > & | srcScalarRegOperands () const |
| const std::vector< OperandInfo > & | dstScalarRegOperands () const |
Protected Attributes | |
| InFmt_SOPK | instData |
| InstFormat | extData |
| uint32_t | varSize |
Protected Attributes inherited from gem5::VegaISA::VEGAGPUStaticInst | |
| ScalarRegU32 | _srcLiteral |
| if the instruction has a src literal - an immediate value that is part of the instruction stream - we store that here | |
Protected Attributes inherited from gem5::GPUStaticInst | |
| const std::string | _opcode |
| std::string | disassembly |
| int | _instNum |
| int | _instAddr |
| std::vector< OperandInfo > | srcOps |
| std::vector< OperandInfo > | dstOps |
Private Member Functions | |
| bool | hasSecondDword (InFmt_SOPK *) |
Additional Inherited Members | |
Public Types inherited from gem5::GPUStaticInst | |
| enum | OpType { SRC_VEC , SRC_SCALAR , DST_VEC , DST_SCALAR } |
| typedef int(RegisterManager::* | MapRegFn) (Wavefront *, int) |
Public Attributes inherited from gem5::GPUStaticInst | |
| enums::StorageClassType | executed_as |
Static Public Attributes inherited from gem5::GPUStaticInst | |
| static uint64_t | dynamic_id_count |
Protected Member Functions inherited from gem5::VegaISA::VEGAGPUStaticInst | |
| void | panicUnimplemented () const |
Definition at line 95 of file op_encodings.hh.
| gem5::VegaISA::Inst_SOPK::Inst_SOPK | ( | InFmt_SOPK * | iFmt, |
| const std::string & | opcode ) |
Definition at line 128 of file op_encodings.cc.
References gem5::VegaISA::VEGAGPUStaticInst::_srcLiteral, extData, hasSecondDword(), instData, gem5::GPUStaticInst::opcode(), gem5::GPUStaticInst::setFlag(), varSize, and gem5::VegaISA::VEGAGPUStaticInst::VEGAGPUStaticInst().
Referenced by gem5::VegaISA::Inst_SOPK__S_ADDK_I32::Inst_SOPK__S_ADDK_I32(), gem5::VegaISA::Inst_SOPK__S_CBRANCH_I_FORK::Inst_SOPK__S_CBRANCH_I_FORK(), gem5::VegaISA::Inst_SOPK__S_CMOVK_I32::Inst_SOPK__S_CMOVK_I32(), gem5::VegaISA::Inst_SOPK__S_CMPK_EQ_I32::Inst_SOPK__S_CMPK_EQ_I32(), gem5::VegaISA::Inst_SOPK__S_CMPK_EQ_U32::Inst_SOPK__S_CMPK_EQ_U32(), gem5::VegaISA::Inst_SOPK__S_CMPK_GE_I32::Inst_SOPK__S_CMPK_GE_I32(), gem5::VegaISA::Inst_SOPK__S_CMPK_GE_U32::Inst_SOPK__S_CMPK_GE_U32(), gem5::VegaISA::Inst_SOPK__S_CMPK_GT_I32::Inst_SOPK__S_CMPK_GT_I32(), gem5::VegaISA::Inst_SOPK__S_CMPK_GT_U32::Inst_SOPK__S_CMPK_GT_U32(), gem5::VegaISA::Inst_SOPK__S_CMPK_LE_I32::Inst_SOPK__S_CMPK_LE_I32(), gem5::VegaISA::Inst_SOPK__S_CMPK_LE_U32::Inst_SOPK__S_CMPK_LE_U32(), gem5::VegaISA::Inst_SOPK__S_CMPK_LG_I32::Inst_SOPK__S_CMPK_LG_I32(), gem5::VegaISA::Inst_SOPK__S_CMPK_LG_U32::Inst_SOPK__S_CMPK_LG_U32(), gem5::VegaISA::Inst_SOPK__S_CMPK_LT_I32::Inst_SOPK__S_CMPK_LT_I32(), gem5::VegaISA::Inst_SOPK__S_CMPK_LT_U32::Inst_SOPK__S_CMPK_LT_U32(), gem5::VegaISA::Inst_SOPK__S_GETREG_B32::Inst_SOPK__S_GETREG_B32(), gem5::VegaISA::Inst_SOPK__S_MOVK_I32::Inst_SOPK__S_MOVK_I32(), gem5::VegaISA::Inst_SOPK__S_MULK_I32::Inst_SOPK__S_MULK_I32(), gem5::VegaISA::Inst_SOPK__S_SETREG_B32::Inst_SOPK__S_SETREG_B32(), and gem5::VegaISA::Inst_SOPK__S_SETREG_IMM32_B32::Inst_SOPK__S_SETREG_IMM32_B32().
| gem5::VegaISA::Inst_SOPK::~Inst_SOPK | ( | ) |
Definition at line 145 of file op_encodings.cc.
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overridevirtual |
Implements gem5::GPUStaticInst.
Definition at line 201 of file op_encodings.cc.
References gem5::GPUStaticInst::_opcode, gem5::GPUStaticInst::disassembly, extData, instData, and gem5::VegaISA::opSelectorToRegSym().
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private |
Definition at line 184 of file op_encodings.cc.
References gem5::VegaISA::InFmt_SOPK::OP.
Referenced by Inst_SOPK().
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overridevirtual |
Implements gem5::GPUStaticInst.
Definition at line 150 of file op_encodings.cc.
References gem5::GPUStaticInst::dstOps, gem5::GPUStaticInst::getNumOperands(), gem5::VegaISA::VEGAGPUStaticInst::getOperandSize(), instData, gem5::VegaISA::isScalarReg(), gem5::GPUStaticInst::numDstRegOperands(), gem5::GPUStaticInst::numSrcRegOperands(), gem5::X86ISA::reg, and gem5::GPUStaticInst::srcOps.
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overridevirtual |
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protected |
Definition at line 110 of file op_encodings.hh.
Referenced by gem5::VegaISA::Inst_SOPK__S_SETREG_IMM32_B32::execute(), generateDisassembly(), and Inst_SOPK().
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protected |
Definition at line 108 of file op_encodings.hh.
Referenced by gem5::VegaISA::Inst_SOPK__S_ADDK_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMOVK_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_EQ_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_EQ_U32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_GE_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_GE_U32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_GT_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_GT_U32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_LE_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_LE_U32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_LG_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_LG_U32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_LT_I32::execute(), gem5::VegaISA::Inst_SOPK__S_CMPK_LT_U32::execute(), gem5::VegaISA::Inst_SOPK__S_GETREG_B32::execute(), gem5::VegaISA::Inst_SOPK__S_MOVK_I32::execute(), gem5::VegaISA::Inst_SOPK__S_MULK_I32::execute(), gem5::VegaISA::Inst_SOPK__S_SETREG_B32::execute(), gem5::VegaISA::Inst_SOPK__S_SETREG_IMM32_B32::execute(), generateDisassembly(), initOperandInfo(), and Inst_SOPK().
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protected |
Definition at line 111 of file op_encodings.hh.
Referenced by Inst_SOPK(), and instSize().