gem5 [DEVELOP-FOR-25.0]
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device.hh File Reference
#include <cstring>
#include <vector>
#include "dev/dma_device.hh"
#include "dev/pci/host.hh"
#include "dev/pci/pcireg.h"
#include "params/PciBar.hh"
#include "params/PciBarNone.hh"
#include "params/PciBridge.hh"
#include "params/PciDevice.hh"
#include "params/PciEndpoint.hh"
#include "params/PciIoBar.hh"
#include "params/PciLegacyIoBar.hh"
#include "params/PciMemBar.hh"
#include "params/PciMemUpperBar.hh"
#include "sim/byteswap.hh"

Go to the source code of this file.

Classes

class  gem5::PciBar
 
class  gem5::PciBarNone
 
class  gem5::PciIoBar
 
class  gem5::PciLegacyIoBar
 
class  gem5::PciMemBar
 
class  gem5::PciMemUpperBar
 
class  gem5::PciDevice
 PCI device, base implementation is only config space. More...
 
class  gem5::PciEndpoint
 
class  gem5::PciBridge
 

Namespaces

namespace  gem5
 Copyright (c) 2024 Arm Limited All rights reserved.
 

Macros

#define PCI0_BAR_NUMBER(x)
 
#define PCI1_BAR_NUMBER(x)
 

Macro Definition Documentation

◆ PCI0_BAR_NUMBER

#define PCI0_BAR_NUMBER ( x)
Value:
(((x) - PCI0_BASE_ADDR0) >> 0x2);
#define PCI0_BASE_ADDR0
Definition pcireg.h:198

Definition at line 65 of file device.hh.

Referenced by gem5::PciEndpoint::writeConfig().

◆ PCI1_BAR_NUMBER

#define PCI1_BAR_NUMBER ( x)
Value:
(((x) - PCI1_BASE_ADDR0) >> 0x2);
#define PCI1_BASE_ADDR0
Definition pcireg.h:213

Definition at line 66 of file device.hh.

Referenced by gem5::PciBridge::writeConfig().


Generated on Mon May 26 2025 09:19:16 for gem5 by doxygen 1.13.2