upstream.hh

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/*
 * Copyright (c) 2025 REDS institute of the HEIG-VD
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 *
 * Copyright (c) 2015 ARM Limited
 * All rights reserved
 *
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 * not be construed as granting a license to any other intellectual
 * property including but not limited to intellectual property relating
 * to a hardware implementation of the functionality of the software
 * licensed hereunder.  You may use the software subject to the license
 * terms below provided that you ensure that this notice is replicated
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#ifndef __DEV_PCI_UPSTREAM_HH__
#define __DEV_PCI_UPSTREAM_HH__
 
#include <map>
 
#include "base/addr_range.hh"
#include "dev/isa_fake.hh"
#include "dev/pci/types.hh"
#include "dev/pci/up_down_bridge.hh"
#include "params/PciConfigError.hh"
#include "params/PciUpstream.hh"
#include "sim/clocked_object.hh"
 
namespace gem5
{
 
class PciDevice;
 
class PciConfigError : public IsaFake
{
  public:
    PARAMS(PciConfigError);
 
    PciConfigError(const Params &p);
 
    void setAddrRange(AddrRange range);
};

class PciUpstream : public ClockedObject
{
  public:
    PARAMS(PciUpstream);
 
    PciUpstream(const Params &p);
 
    void init() override;


    class DeviceInterface
    {
        friend class gem5::PciUpstream;
 
      protected:
        DeviceInterface(PciUpstream &upstream, const PciDevAddr &dev_addr,
                        PciIntPin pin);
 
      public:
        DeviceInterface() = delete;
        void operator=(const DeviceInterface &) = delete;
 
        const std::string name() const;

        void postInt();

        void clearInt();

        AddrRange
        configRange() const
        {
            return upstream.interfaceConfigRange(devAddr);
        }

        Addr
        pioAddr(Addr addr) const
        {
            return upstream.interfacePioAddr(devAddr, addr);
        }

        Addr
        memAddr(Addr addr) const
        {
            return upstream.interfaceMemAddr(devAddr, addr);
        }

        Addr
        dmaAddr(Addr addr) const
        {
            return upstream.interfaceDmaAddr(devAddr, addr);
        }
 
      protected:
        PciUpstream &upstream;
 
        const PciDevAddr devAddr;
        const PciIntPin interruptPin;
    };

    virtual DeviceInterface registerDevice(PciDevice *device,
                                           PciDevAddr dev_addr, PciIntPin pin);


    void sendBusChange();
 
  protected:
    virtual AddrRange getConfigAddrRange() const = 0;


    virtual void interfacePostInt(const PciDevAddr &dev_addr,
                                  PciIntPin pin) = 0;

    virtual void interfaceClearInt(const PciDevAddr &dev_addr,
                                   PciIntPin pin) = 0;

    virtual AddrRange
    interfaceConfigRange(const PciDevAddr &dev_addr) const = 0;

    virtual Addr interfacePioAddr(const PciDevAddr &dev_addr,
                                  Addr pci_addr) const = 0;

    virtual Addr interfaceMemAddr(const PciDevAddr &dev_addr,
                                  Addr pci_addr) const = 0;

    virtual Addr interfaceDmaAddr(const PciDevAddr &dev_addr,
                                  Addr pci_addr) const = 0;


    virtual PciBusNum getBusNum() const = 0;
 
  protected:
    PciDevice *getDevice(const PciDevAddr &addr);

    const PciDevice *getDevice(const PciDevAddr &addr) const;
 
  private:
    std::map<PciDevAddr, PciDevice *> devices;

    PciUpDownBridge *upToDown;
 
    PciConfigError *configErrorDevice;
};
 
} // namespace gem5
 
#endif // __DEV_PCI_UPSTREAM_HH__