gem5 [DEVELOP-FOR-25.1]
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faults.cc
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1/*
2 * Copyright (c) 2020 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 */
40
41#include "sim/faults.hh"
42
43#include <csignal>
44
46#include "base/logging.hh"
47#include "cpu/base.hh"
48#include "cpu/thread_context.hh"
49#include "debug/Faults.hh"
50#include "mem/page_table.hh"
51#include "sim/full_system.hh"
52#include "sim/process.hh"
53#include "sim/system.hh"
54
55namespace gem5
56{
57
58void
60{
61 panic_if(!FullSystem, "fault (%s) detected @ PC %s",
62 name(), tc->pcState());
63 DPRINTF(Faults, "Fault %s at PC: %s\n", name(), tc->pcState());
64}
65
66void
68{
69 panic("Unimpfault: %s", panicStr.c_str());
70}
71
72void
74{
75 // Move the PC forward since that doesn't happen automatically.
76 std::unique_ptr<PCStateBase> pc(tc->pcState().clone());
77 inst->advancePC(*pc);
78 tc->pcState(*pc);
79
80 tc->getSystemPtr()->workload->syscall(tc);
81}
82
83void
85{
86 tc->pcState(tc->pcState());
87}
88
89void
91{
92 tc->pcState(tc->pcState());
93}
94
95void
97{
98 bool handled = false;
99 if (!FullSystem) {
100 Process *p = tc->getProcessPtr();
101 handled = p->fixupFault(vaddr);
102 }
103 panic_if(!handled &&
104 !tc->getSystemPtr()->trapToGdb(GDBSignal::SEGV, tc->contextId()),
105 "Page table fault when accessing virtual address %#x\n", vaddr);
106}
107
108void
110{
111 panic_if(!tc->getSystemPtr()->trapToGdb(GDBSignal::SEGV, tc->contextId()),
112 "Alignment fault when accessing virtual address %#x\n", vaddr);
113}
114
116 const StaticInstPtr &inst)
117{
118 // reset decoder
119 InstDecoder* dcdr = tc->getDecoderPtr();
120 dcdr->reset();
121
122 // restore transaction checkpoint
123 const auto& checkpoint = tc->getHtmCheckpointPtr();
124 assert(checkpoint);
125 assert(checkpoint->valid());
126
127 checkpoint->restore(tc, getHtmFailureFaultCause());
128
129 // reset the global monitor
131
132 // send abort packet to ruby (in final breath)
134}
135
136} // namespace gem5
#define DPRINTF(x,...)
Definition trace.hh:209
virtual void globalClearExclusive()
Definition isa.hh:128
virtual FaultName name() const =0
virtual void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
Definition faults.cc:59
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition faults.cc:109
HtmFailureFaultCause getHtmFailureFaultCause() const
Definition faults.hh:154
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition faults.cc:115
HtmFailureFaultCause cause
Definition faults.hh:144
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition faults.cc:96
virtual void reset()
Definition decoder.hh:63
virtual PCStateBase * clone() const =0
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition faults.cc:84
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition faults.cc:73
virtual void advancePC(PCStateBase &pc_state) const =0
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition faults.cc:90
Workload * workload
OS kernel.
Definition system.hh:331
bool trapToGdb(GDBSignal signal, ContextID ctx_id) const
Definition system.cc:407
ThreadContext is the external interface to all thread state for anything outside of the CPU.
virtual void htmAbortTransaction(uint64_t htm_uid, HtmFailureFaultCause cause)=0
virtual System * getSystemPtr()=0
virtual BaseISA * getIsaPtr() const =0
virtual BaseHTMCheckpointPtr & getHtmCheckpointPtr()=0
virtual InstDecoder * getDecoderPtr()=0
virtual const PCStateBase & pcState() const =0
virtual Process * getProcessPtr()=0
virtual ContextID contextId() const =0
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition faults.cc:67
std::string panicStr
Definition faults.hh:70
virtual void syscall(ThreadContext *tc)
Definition workload.hh:113
#define panic(...)
This implements a cprintf based panic() function.
Definition logging.hh:220
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition logging.hh:246
Bitfield< 4 > pc
Bitfield< 0 > p
Copyright (c) 2024 Arm Limited All rights reserved.
Definition binary32.hh:36
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
Definition root.cc:220
RefCountingPtr< StaticInst > StaticInstPtr
Declarations of a non-full system Page Table.

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