gem5::VegaISA::InFmt_MIMG_1 Struct Reference

#include <gpu_decoder.hh>

Public Attributes
unsigned int	VADDR: 8
unsigned int	VDATA: 8
unsigned int	SRSRC: 5
unsigned int	SSAMP: 5
unsigned int	pad_26_30: 5
unsigned int	D16: 1

Detailed Description

Definition at line 1759 of file gpu_decoder.hh.

Member Data Documentation

D16

unsigned int gem5::VegaISA::InFmt_MIMG_1::D16

Definition at line 1765 of file gpu_decoder.hh.

pad_26_30

unsigned int gem5::VegaISA::InFmt_MIMG_1::pad_26_30

Definition at line 1764 of file gpu_decoder.hh.

SRSRC

unsigned int gem5::VegaISA::InFmt_MIMG_1::SRSRC

Definition at line 1762 of file gpu_decoder.hh.

SSAMP

unsigned int gem5::VegaISA::InFmt_MIMG_1::SSAMP

Definition at line 1763 of file gpu_decoder.hh.

VADDR

unsigned int gem5::VegaISA::InFmt_MIMG_1::VADDR

Definition at line 1760 of file gpu_decoder.hh.

VDATA

unsigned int gem5::VegaISA::InFmt_MIMG_1::VDATA

Definition at line 1761 of file gpu_decoder.hh.

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The documentation for this struct was generated from the following file:

• arch/amdgpu/vega/gpu_decoder.hh