gem5::VegaISA::InFmt_MTBUF Struct Reference

#include <gpu_decoder.hh>

Public Attributes
unsigned int	OFFSET: 12
unsigned int	OFFEN: 1
unsigned int	IDXEN: 1
unsigned int	GLC: 1
unsigned int	OP: 4
unsigned int	DFMT: 4
unsigned int	NFMT: 3
unsigned int	ENCODING: 6

Detailed Description

Definition at line 1860 of file gpu_decoder.hh.

Member Data Documentation

DFMT

unsigned int gem5::VegaISA::InFmt_MTBUF::DFMT

Definition at line 1866 of file gpu_decoder.hh.

ENCODING

unsigned int gem5::VegaISA::InFmt_MTBUF::ENCODING

Definition at line 1868 of file gpu_decoder.hh.

GLC

unsigned int gem5::VegaISA::InFmt_MTBUF::GLC

Definition at line 1864 of file gpu_decoder.hh.

IDXEN

unsigned int gem5::VegaISA::InFmt_MTBUF::IDXEN

Definition at line 1863 of file gpu_decoder.hh.

NFMT

unsigned int gem5::VegaISA::InFmt_MTBUF::NFMT

Definition at line 1867 of file gpu_decoder.hh.

OFFEN

unsigned int gem5::VegaISA::InFmt_MTBUF::OFFEN

Definition at line 1862 of file gpu_decoder.hh.

OFFSET

unsigned int gem5::VegaISA::InFmt_MTBUF::OFFSET

Definition at line 1861 of file gpu_decoder.hh.

OP

unsigned int gem5::VegaISA::InFmt_MTBUF::OP

Definition at line 1865 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Decoder::subDecode_OP_MTBUF().

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The documentation for this struct was generated from the following file:

• arch/amdgpu/vega/gpu_decoder.hh