gem5::VegaISA::InFmt_SOP1 Struct Reference

#include <gpu_decoder.hh>

Public Attributes
unsigned int	SSRC0: 8
unsigned int	OP: 8
unsigned int	SDST: 7
unsigned int	ENCODING: 9

Detailed Description

Definition at line 1829 of file gpu_decoder.hh.

Member Data Documentation

ENCODING

unsigned int gem5::VegaISA::InFmt_SOP1::ENCODING

Definition at line 1833 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Decoder::decode().

OP

unsigned int gem5::VegaISA::InFmt_SOP1::OP

Definition at line 1831 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Decoder::subDecode_OP_SOP1().

SDST

unsigned int gem5::VegaISA::InFmt_SOP1::SDST

Definition at line 1832 of file gpu_decoder.hh.

SSRC0

unsigned int gem5::VegaISA::InFmt_SOP1::SSRC0

Definition at line 1830 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Inst_SOP1::hasSecondDword().

---

The documentation for this struct was generated from the following file:

• arch/amdgpu/vega/gpu_decoder.hh