gem5::VegaISA::InFmt_SOPC Struct Reference

#include <gpu_decoder.hh>

Public Attributes
unsigned int	SSRC0: 8
unsigned int	SSRC1: 8
unsigned int	OP: 7
unsigned int	ENCODING: 9

Detailed Description

Definition at line 1936 of file gpu_decoder.hh.

Member Data Documentation

ENCODING

unsigned int gem5::VegaISA::InFmt_SOPC::ENCODING

Definition at line 1940 of file gpu_decoder.hh.

OP

unsigned int gem5::VegaISA::InFmt_SOPC::OP

Definition at line 1939 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Decoder::subDecode_OP_SOPC().

SSRC0

unsigned int gem5::VegaISA::InFmt_SOPC::SSRC0

Definition at line 1937 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Inst_SOPC::hasSecondDword().

SSRC1

unsigned int gem5::VegaISA::InFmt_SOPC::SSRC1

Definition at line 1938 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::Inst_SOPC::hasSecondDword().

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The documentation for this struct was generated from the following file:

• arch/amdgpu/vega/gpu_decoder.hh