gem5::VegaISA::InFmt_VOP_DPP Struct Reference

#include <gpu_decoder.hh>

Public Attributes
unsigned int	SRC0: 8
unsigned int	DPP_CTRL: 9
unsigned int	pad_17_18: 2
unsigned int	BC: 1
unsigned int	SRC0_NEG: 1
unsigned int	SRC0_ABS: 1
unsigned int	SRC1_NEG: 1
unsigned int	SRC1_ABS: 1
unsigned int	BANK_MASK: 4
unsigned int	ROW_MASK: 4

Detailed Description

Definition at line 2012 of file gpu_decoder.hh.

Member Data Documentation

BANK_MASK

unsigned int gem5::VegaISA::InFmt_VOP_DPP::BANK_MASK

Definition at line 2021 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::processDPP().

BC

unsigned int gem5::VegaISA::InFmt_VOP_DPP::BC

Definition at line 2016 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::processDPP().

DPP_CTRL

unsigned int gem5::VegaISA::InFmt_VOP_DPP::DPP_CTRL

Definition at line 2014 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::processDPP().

pad_17_18

unsigned int gem5::VegaISA::InFmt_VOP_DPP::pad_17_18

Definition at line 2015 of file gpu_decoder.hh.

ROW_MASK

unsigned int gem5::VegaISA::InFmt_VOP_DPP::ROW_MASK

Definition at line 2022 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::processDPP().

SRC0

unsigned int gem5::VegaISA::InFmt_VOP_DPP::SRC0

Definition at line 2013 of file gpu_decoder.hh.

SRC0_ABS

unsigned int gem5::VegaISA::InFmt_VOP_DPP::SRC0_ABS

Definition at line 2018 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::processDPP().

SRC0_NEG

unsigned int gem5::VegaISA::InFmt_VOP_DPP::SRC0_NEG

Definition at line 2017 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::processDPP().

SRC1_ABS

unsigned int gem5::VegaISA::InFmt_VOP_DPP::SRC1_ABS

Definition at line 2020 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::processDPP().

SRC1_NEG

unsigned int gem5::VegaISA::InFmt_VOP_DPP::SRC1_NEG

Definition at line 2019 of file gpu_decoder.hh.

Referenced by gem5::VegaISA::processDPP().

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The documentation for this struct was generated from the following file:

• arch/amdgpu/vega/gpu_decoder.hh