gem5 [DEVELOP-FOR-25.1]
Loading...
Searching...
No Matches
timer_cpulocal.hh
Go to the documentation of this file.
1/*
2 * Copyright (c) 2010-2011,2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#ifndef __DEV_ARM_LOCALTIMER_HH__
39#define __DEV_ARM_LOCALTIMER_HH__
40
41#include <cstdint>
42#include <memory>
43#include <vector>
44
45#include "base/bitunion.hh"
46#include "base/types.hh"
47#include "dev/io_device.hh"
48#include "sim/serialize.hh"
49
54
55namespace gem5
56{
57
58class BaseGic;
59class ArmInterruptPin;
60
61struct CpuLocalTimerParams;
62
64{
65 protected:
66 class Timer : public Serializable
67 {
68
69 public:
70 enum
71 {
82 Size = 0x38
83 };
84
85 BitUnion32(TimerCtrl)
86 Bitfield<0> enable;
87 Bitfield<1> autoReload;
88 Bitfield<2> intEnable;
89 Bitfield<7,3> reserved;
90 Bitfield<15,8> prescalar;
91 EndBitUnion(TimerCtrl)
92
93 BitUnion32(WatchdogCtrl)
94 Bitfield<0> enable;
95 Bitfield<1> autoReload;
96 Bitfield<2> intEnable;
97 Bitfield<3> watchdogMode;
98 Bitfield<7,4> reserved;
99 Bitfield<15,8> prescalar;
100 EndBitUnion(WatchdogCtrl)
101
102 protected:
103 std::string _name;
104
107
111
113 TimerCtrl timerControl;
114 WatchdogCtrl watchdogControl;
115
122
127
131
133 void timerAtZero();
135
136 void watchdogAtZero();
138 public:
141 void restartTimerCounter(uint32_t val);
142 void restartWatchdogCounter(uint32_t val);
143
144 Timer(const std::string &name,
145 CpuLocalTimer* _parent,
146 ArmInterruptPin* int_timer,
147 ArmInterruptPin* int_watchdog);
148
149 std::string name() const { return _name; }
150
152 void read(PacketPtr pkt, Addr daddr);
153
155 void write(PacketPtr pkt, Addr daddr);
156
157 void serialize(CheckpointOut &cp) const override;
158 void unserialize(CheckpointIn &cp) override;
159
160 friend class CpuLocalTimer;
161 };
162
165
168
169 public:
171
176 CpuLocalTimer(const Params &p);
177
179 void init() override;
180
186 Tick read(PacketPtr pkt) override;
187
193 Tick write(PacketPtr pkt) override;
194
195 void serialize(CheckpointOut &cp) const override;
196 void unserialize(CheckpointIn &cp) override;
197};
198
199} // namespace gem5
200
201#endif // __DEV_ARM_SP804_HH__
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
#define BitUnion32(name)
Definition bitunion.hh:495
Generic representation of an Arm interrupt pin.
Definition base_gic.hh:200
BasicPioDevice(const Params &p, Addr size)
Definition io_device.cc:75
EndBitUnion(TimerCtrl) BitUnion32(WatchdogCtrl) Bitfield< 0 > enable
Bitfield< 15, 8 > prescalar
void serialize(CheckpointOut &cp) const override
Serialize an object.
bool rawIntTimer
If timer has caused an interrupt.
void restartTimerCounter(uint32_t val)
Restart the counter ticking at val.
EndBitUnion(WatchdogCtrl) protected CpuLocalTimer * parent
Pointer to parent class.
Timer(const std::string &name, CpuLocalTimer *_parent, ArmInterruptPin *int_timer, ArmInterruptPin *int_watchdog)
void write(PacketPtr pkt, Addr daddr)
Handle write for a single timer.
EventFunctionWrapper watchdogZeroEvent
uint32_t timerLoadValue
Value to load into counters when periodic mode reaches 0.
void timerAtZero()
Called when the counter reaches 0.
ArmInterruptPin * intWatchdog
EventFunctionWrapper timerZeroEvent
TimerCtrl timerControl
Control register as specified above.
BitUnion32(TimerCtrl) Bitfield< 0 > enable
void read(PacketPtr pkt, Addr daddr)
Handle read for a single timer.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
bool pendingIntTimer
If an interrupt is currently pending.
void restartWatchdogCounter(uint32_t val)
ArmInterruptPin * intTimer
Interrupt to cause/clear.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
PARAMS(CpuLocalTimer)
void serialize(CheckpointOut &cp) const override
Serialize an object.
std::vector< std::unique_ptr< Timer > > localTimer
Timers that do the actual work.
Tick read(PacketPtr pkt) override
Handle a read to the device.
Tick write(PacketPtr pkt) override
Handle a write to the device.
CpuLocalTimer(const Params &p)
The constructor for RealView just registers itself with the MMU.
BaseGic * gic
Pointer to the GIC for causing an interrupt.
void init() override
Inits the local timers.
const std::string _name
Definition named.hh:54
PioDeviceParams Params
Definition io_device.hh:134
STL vector class.
Definition stl.hh:37
#define EndBitUnion(name)
This closes off the class and union started by the above macro.
Definition bitunion.hh:428
Bitfield< 0 > p
Bitfield< 11 > enable
Definition misc.hh:1086
Bitfield< 63 > val
Definition misc.hh:804
Copyright (c) 2024 Arm Limited All rights reserved.
Definition binary32.hh:36
std::ostream CheckpointOut
Definition serialize.hh:66
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
uint64_t Tick
Tick count type.
Definition types.hh:58
Packet * PacketPtr

Generated on Mon Oct 27 2025 04:13:01 for gem5 by doxygen 1.14.0