gem5 v25.0.0.1
Loading...
Searching...
No Matches
pmu.hh File Reference
#include <map>
#include <memory>
#include <vector>
#include "arch/arm/isa_device.hh"
#include "arch/arm/system.hh"
#include "base/cprintf.hh"
#include "cpu/base.hh"
#include "debug/PMUVerbose.hh"
#include "enums/EventTypeId.hh"
#include "mem/cache/cache_probe_arg.hh"
#include "sim/eventq.hh"
#include "sim/sim_object.hh"
#include "sim/system.hh"

Go to the source code of this file.

Classes

class  gem5::ArmISA::PMU
 Model of an ARM PMU version 3. More...
struct  gem5::ArmISA::PMU::PMUEvent
 Event definition base class. More...
struct  gem5::ArmISA::PMU::RegularEvent
struct  gem5::ArmISA::PMU::RegularEvent::RegularProbe
struct  gem5::ArmISA::PMU::RegularEvent::CacheProbe
class  gem5::ArmISA::PMU::SWIncrementEvent
struct  gem5::ArmISA::PMU::CounterState
 State of a counter within the PMU. More...
struct  gem5::ArmISA::PMU::Stats

Namespaces

namespace  gem5
 Copyright (c) 2024 Arm Limited All rights reserved.
namespace  gem5::ArmISA

Generated on Sat Oct 18 2025 08:06:47 for gem5 by doxygen 1.14.0