gem5 v25.0.0.1
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gem5::ArmISA::PCAlignmentFault Class Reference

PC alignment fault (AArch64 only) More...

#include <faults.hh>

Inheritance diagram for gem5::ArmISA::PCAlignmentFault:
gem5::ArmISA::ArmFaultVals< PCAlignmentFault > gem5::ArmISA::ArmFault gem5::FaultBase

Public Member Functions

 PCAlignmentFault (Addr fault_pc)
void invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
bool routeToHyp (ThreadContext *tc) const override
bool il (ThreadContext *tc) const override
 Syndrome methods.
Public Member Functions inherited from gem5::ArmISA::ArmFaultVals< PCAlignmentFault >
 ArmFaultVals (ExtMachInst mach_inst=0, uint32_t _iss=0)
FaultName name () const override
FaultOffset offset (ThreadContext *tc) override
FaultOffset offset64 (ThreadContext *tc) override
OperatingMode nextMode () override
virtual bool routeToMonitor (ThreadContext *tc) const override
uint8_t armPcOffset (bool is_hyp) override
uint8_t thumbPcOffset (bool is_hyp) override
uint8_t armPcElrOffset () override
uint8_t thumbPcElrOffset () override
bool abortDisable (ThreadContext *tc) override
bool fiqDisable (ThreadContext *tc) override
ExceptionClass ec (ThreadContext *tc) const override
 Syndrome methods.
uint32_t iss () const override
Public Member Functions inherited from gem5::ArmISA::ArmFault
 ArmFault (ExtMachInst mach_inst=0, uint32_t _iss=0)
MiscRegIndex getSyndromeReg64 () const
void invoke32 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
void invoke64 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
virtual void update (ThreadContext *tc)
bool isResetSPSR ()
bool vectorCatch (ThreadContext *tc, const StaticInstPtr &inst)
ArmStaticInstinstrAnnotate (const StaticInstPtr &inst)
virtual void annotate (AnnotationIDs id, uint64_t val)
virtual uint32_t vectorCatchFlag () const
virtual bool isStage2 () const
virtual FSR getFsr (ThreadContext *tc) const
virtual void setSyndrome (ThreadContext *tc, MiscRegIndex syndrome_reg)
virtual bool getFaultVAddr (Addr &va) const
OperatingMode getToMode () const
virtual bool isExternalAbort () const
Public Member Functions inherited from gem5::FaultBase
virtual ~FaultBase ()

Protected Attributes

Addr faultPC
 The unaligned value of the PC.
Protected Attributes inherited from gem5::ArmISA::ArmFault
ExtMachInst machInst
uint32_t issRaw
bool bStep
bool from64
bool to64
ExceptionLevel fromEL
ExceptionLevel toEL
OperatingMode fromMode
OperatingMode toMode
bool faultUpdated
bool hypRouted
bool span

Additional Inherited Members

Public Types inherited from gem5::ArmISA::ArmFault
enum  FaultSource {
  AlignmentFault = 0 , InstructionCacheMaintenance , SynchExtAbtOnTranslTableWalkLL , SynchPtyErrOnTranslTableWalkLL = SynchExtAbtOnTranslTableWalkLL + 4 ,
  TranslationLL = SynchPtyErrOnTranslTableWalkLL + 4 , AccessFlagLL = TranslationLL + 4 , DomainLL = AccessFlagLL + 4 , PermissionLL = DomainLL + 4 ,
  DebugEvent = PermissionLL + 4 , SynchronousExternalAbort , TLBConflictAbort , SynchPtyErrOnMemoryAccess ,
  AsynchronousExternalAbort , AsynchPtyErrOnMemoryAccess , AddressSizeLL , PrefetchTLBMiss = AddressSizeLL + 4 ,
  PrefetchUncacheable , NumFaultSources , FaultSourceInvalid = 0xff
}
 Generic fault source enums used to index into {short/long/aarch64}DescFaultSources[] to get the actual encodings based on the current register width state and the translation table format in use. More...
enum  AnnotationIDs {
  S1PTW , OVA , SAS , SSE ,
  SRT , CM , OFA , WnR ,
  SF , AR
}
enum  DebugType {
  NODEBUG = 0 , BRKPOINT , VECTORCATCH , WPOINT_CM ,
  WPOINT_NOCM
}
Static Public Attributes inherited from gem5::ArmISA::ArmFault
static uint8_t shortDescFaultSources [NumFaultSources]
 Encodings of the fault sources when the short-desc.
static uint8_t longDescFaultSources [NumFaultSources]
 Encodings of the fault sources when the long-desc.
static uint8_t aarch64FaultSources [NumFaultSources]
 Encodings of the fault sources in AArch64 state.
Protected Member Functions inherited from gem5::ArmISA::ArmFaultVals< PCAlignmentFault >
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
ArmFault::FaultVals vals
Protected Member Functions inherited from gem5::ArmISA::ArmFault
virtual Addr getVector (ThreadContext *tc)
Addr getVector64 (ThreadContext *tc)

Detailed Description

PC alignment fault (AArch64 only)

Definition at line 622 of file faults.hh.

Constructor & Destructor Documentation

◆ PCAlignmentFault()

gem5::ArmISA::PCAlignmentFault::PCAlignmentFault ( Addr fault_pc)
inline

Definition at line 628 of file faults.hh.

References faultPC.

Member Function Documentation

◆ il()

bool gem5::ArmISA::PCAlignmentFault::il ( ThreadContext * tc) const
inlineoverridevirtual

Syndrome methods.

Reimplemented from gem5::ArmISA::ArmFaultVals< PCAlignmentFault >.

Definition at line 635 of file faults.hh.

◆ invoke()

void gem5::ArmISA::PCAlignmentFault::invoke ( ThreadContext * tc,
const StaticInstPtr & inst = nullStaticInstPtr )
overridevirtual

◆ routeToHyp()

bool gem5::ArmISA::PCAlignmentFault::routeToHyp ( ThreadContext * tc) const
overridevirtual

Member Data Documentation

◆ faultPC

Addr gem5::ArmISA::PCAlignmentFault::faultPC
protected

The unaligned value of the PC.

Definition at line 626 of file faults.hh.

Referenced by invoke(), and PCAlignmentFault().


The documentation for this class was generated from the following files:

Generated on Sat Oct 18 2025 08:06:56 for gem5 by doxygen 1.14.0