gem5::ArmISA::TLBIRIPA Class Reference

TLB Range Invalidate by VA, All ASIDs. More...

#include <tlbi_op.hh>

Inheritance diagram for gem5::ArmISA::TLBIRIPA:

Public Member Functions
	TLBIRIPA (ThreadContext *tc, TranslationRegime _target_regime, SecurityState _ss, RegVal val, bool last_level, Attr _attr)
bool	matchEntry (TlbEntry *entry, vmid_t curr_vmid) const override
Public Member Functions inherited from gem5::ArmISA::TLBIRange
bool	valid () const
	Is the range valid?
Public Member Functions inherited from gem5::ArmISA::TLBIIPA
	TLBIIPA (TranslationRegime _target_regime, SecurityState _ss, Addr _addr, bool last_level, Attr _attr=Attr::None)
	TLBIIPA (ThreadContext *tc, TranslationRegime _target_regime, SecurityState _ss, RegVal val, bool last_level, Attr _attr=Attr::None)
void	operator() (ThreadContext *tc) override
bool	stage1Flush () const override
	Return true if the TLBI op needs to flush stage1 entries, Defaulting to true in the TLBIOp abstract class.
Public Member Functions inherited from gem5::ArmISA::TLBIOp
	TLBIOp (TranslationRegime _target_regime, SecurityState _ss, Attr _attr)
virtual	~TLBIOp ()
void	broadcast (ThreadContext *tc)
	Broadcast the TLB Invalidate operation to all TLBs in the Arm system.
bool	match (TlbEntry *entry, vmid_t curr_vmid) const
virtual bool	stage2Flush () const
	Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract class.

Additional Inherited Members
Public Types inherited from gem5::ArmISA::TLBIOp
enum class	Attr { None , ExcludeXS }
Public Attributes inherited from gem5::ArmISA::TLBIIPA
Addr	addr
bool	lastLevel
PASpace	ipaSpace
Public Attributes inherited from gem5::ArmISA::TLBIOp
SecurityState	ss
TranslationRegime	targetRegime
Attr	attr
Protected Member Functions inherited from gem5::ArmISA::TLBIRange
	BitUnion64 (RangeData) Bitfield< 47
	EndBitUnion (RangeData) static const expr std
	TLBIRange (RegVal val)
Addr	startAddress () const
Addr	rangeSize () const
bool	resTLBIttl (uint8_t tg, uint8_t ttl) const
Protected Member Functions inherited from gem5::ArmISA::TLBIIPA
TlbEntry::KeyType	lookupGen (vmid_t vmid) const
Protected Attributes inherited from gem5::ArmISA::TLBIRange
	tg
Bitfield< 45, 44 >	scale
Bitfield< 43, 39 >	num
Bitfield< 38, 37 >	ttl
Bitfield< 36, 0 >	baseAddr
RangeData	rangeData
GrainSize	granule

Detailed Description

TLB Range Invalidate by VA, All ASIDs.

Definition at line 485 of file tlbi_op.hh.

Constructor & Destructor Documentation

TLBIRIPA()

gem5::ArmISA::TLBIRIPA::TLBIRIPA ( ThreadContext * tc, TranslationRegime _target_regime, SecurityState _ss, RegVal val, bool last_level, Attr _attr )

inline

Definition at line 488 of file tlbi_op.hh.

References gem5::ArmISA::TLBIIPA::addr, gem5::ArmISA::TLBIRange::startAddress(), gem5::ArmISA::TLBIIPA::TLBIIPA(), gem5::ArmISA::TLBIRange::TLBIRange(), and gem5::X86ISA::val.

Member Function Documentation

matchEntry()

bool gem5::ArmISA::TLBIRIPA::matchEntry ( TlbEntry * entry, vmid_t curr_vmid ) const

overridevirtual

Reimplemented from gem5::ArmISA::TLBIIPA.

Definition at line 368 of file tlbi_op.cc.

References gem5::ArmISA::TLBIIPA::ipaSpace, gem5::ArmISA::TLBIIPA::lastLevel, gem5::ArmISA::TLBIIPA::lookupGen(), gem5::ArmISA::TLBIRange::rangeData, gem5::ArmISA::TLBIRange::rangeSize(), gem5::ArmISA::TLBIRange::resTLBIttl(), gem5::ArmISA::TLBTypes::KeyType::size, and gem5::ArmISA::te.

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The documentation for this class was generated from the following files:

• arch/arm/tlbi_op.hh
• arch/arm/tlbi_op.cc