gem5 v25.0.0.1
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gem5::VegaISA::Inst_MUBUF Class Reference

#include <op_encodings.hh>

Inheritance diagram for gem5::VegaISA::Inst_MUBUF:
gem5::VegaISA::VEGAGPUStaticInst gem5::GPUStaticInst gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_ADD gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_ADD_X2 gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_AND gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_AND_X2 gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP_X2 gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_DEC gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_DEC_X2 gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_INC gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_INC_X2 gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_OR gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_OR_X2 gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SMAX gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SMAX_X2 gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SMIN gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SMIN_X2 gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SUB gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SUB_X2 gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SWAP gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SWAP_X2 gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_UMAX gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_UMAX_X2 gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_UMIN gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_UMIN_X2 gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_XOR gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_XOR_X2 gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORD gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX2 gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX3 gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX4 gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_D16_X gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_D16_XY gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_D16_XYZ gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_D16_XYZW gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_X gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_XY gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_XYZ gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_XYZW gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SBYTE gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16 gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16_HI gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SSHORT gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_UBYTE gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_USHORT gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_BYTE gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORD gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX2 gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX3 gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX4 gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_D16_X gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_D16_XY gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_D16_XYZ gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_D16_XYZW gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_X gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_XY gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_XYZ gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_XYZW gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_LDS_DWORD gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_SHORT gem5::VegaISA::Inst_MUBUF__BUFFER_WBINVL1 gem5::VegaISA::Inst_MUBUF__BUFFER_WBINVL1_VOL

Public Member Functions

 Inst_MUBUF (InFmt_MUBUF *, const std::string &opcode)
 ~Inst_MUBUF ()
int instSize () const override
void generateDisassembly () override
void initOperandInfo () override
Public Member Functions inherited from gem5::VegaISA::VEGAGPUStaticInst
 VEGAGPUStaticInst (const std::string &opcode)
 ~VEGAGPUStaticInst ()
void generateDisassembly () override
bool isFlatScratchRegister (int opIdx) override
bool isExecMaskRegister (int opIdx) override
void initOperandInfo () override
int getOperandSize (int opIdx) override
int coalescerTokenCount () const override
 Return the number of tokens needed by the coalescer.
ScalarRegU32 srcLiteral () const override
Public Member Functions inherited from gem5::GPUStaticInst
 GPUStaticInst (const std::string &opcode)
virtual ~GPUStaticInst ()
void instAddr (int inst_addr)
int instAddr () const
int nextInstAddr () const
void instNum (int num)
int instNum ()
void ipdInstNum (int num)
int ipdInstNum () const
void initDynOperandInfo (Wavefront *wf, ComputeUnit *cu)
virtual void execute (GPUDynInstPtr gpuDynInst)=0
const std::string & disassemble ()
virtual int getNumOperands ()=0
virtual int numDstRegOperands ()=0
virtual int numSrcRegOperands ()=0
int numSrcVecOperands ()
int numDstVecOperands ()
int numSrcVecDWords ()
int numDstVecDWords ()
int numSrcScalarOperands ()
int numDstScalarOperands ()
int numSrcScalarDWords ()
int numDstScalarDWords ()
int maxOperandSize ()
bool isALU () const
bool isBranch () const
bool isCondBranch () const
bool isNop () const
bool isReturn () const
bool isEndOfKernel () const
bool isKernelLaunch () const
bool isSDWAInst () const
bool isDPPInst () const
bool isUnconditionalJump () const
bool isSpecialOp () const
bool isWaitcnt () const
bool isSleep () const
bool isBarrier () const
bool isMemSync () const
bool isMemRef () const
bool isFlat () const
bool isFlatGlobal () const
bool isFlatScratch () const
bool isLoad () const
bool isStore () const
bool isAtomic () const
bool isAtomicNoRet () const
bool isAtomicRet () const
bool isScalar () const
bool readsSCC () const
bool writesSCC () const
bool readsVCC () const
bool writesVCC () const
bool readsEXEC () const
bool writesEXEC () const
bool readsMode () const
bool writesMode () const
bool ignoreExec () const
bool isAtomicAnd () const
bool isAtomicOr () const
bool isAtomicXor () const
bool isAtomicCAS () const
bool isAtomicExch () const
bool isAtomicAdd () const
bool isAtomicSub () const
bool isAtomicInc () const
bool isAtomicDec () const
bool isAtomicMax () const
bool isAtomicMin () const
bool isArgLoad () const
bool isGlobalMem () const
bool isLocalMem () const
bool isArgSeg () const
bool isGlobalSeg () const
bool isGroupSeg () const
bool isKernArgSeg () const
bool isPrivateSeg () const
bool isReadOnlySeg () const
bool isSpillSeg () const
bool isGloballyCoherent () const
 Coherence domain of a memory instruction.
bool isSystemCoherent () const
bool isI8 () const
bool isF16 () const
bool isF32 () const
bool isF64 () const
bool isFMA () const
bool isMAC () const
bool isMAD () const
bool isMFMA () const
bool hasNoAddr () const
virtual void initiateAcc (GPUDynInstPtr gpuDynInst)
virtual void completeAcc (GPUDynInstPtr gpuDynInst)
virtual uint32_t getTargetPc ()
void setFlag (Flags flag)
const std::string & opcode () const
const std::vector< OperandInfo > & srcOperands () const
const std::vector< OperandInfo > & dstOperands () const
const std::vector< OperandInfo > & srcVecRegOperands () const
const std::vector< OperandInfo > & dstVecRegOperands () const
const std::vector< OperandInfo > & srcScalarRegOperands () const
const std::vector< OperandInfo > & dstScalarRegOperands () const

Protected Member Functions

template<typename T>
void initMemRead (GPUDynInstPtr gpuDynInst)
template<int N>
void initMemRead (GPUDynInstPtr gpuDynInst)
template<typename T>
void initMemWrite (GPUDynInstPtr gpuDynInst)
template<int N>
void initMemWrite (GPUDynInstPtr gpuDynInst)
template<typename T>
void initAtomicAccess (GPUDynInstPtr gpuDynInst)
void injectGlobalMemFence (GPUDynInstPtr gpuDynInst)
template<typename VOFF, typename VIDX, typename SRSRC, typename SOFF>
void calcAddr (GPUDynInstPtr gpuDynInst, VOFF v_off, VIDX v_idx, SRSRC s_rsrc_desc, SOFF s_offset, int inst_offset)
 MUBUF insructions calculate their addresses as follows:
Protected Member Functions inherited from gem5::VegaISA::VEGAGPUStaticInst
void panicUnimplemented () const

Protected Attributes

InFmt_MUBUF instData
InFmt_MUBUF_1 extData
VectorMask oobMask
Protected Attributes inherited from gem5::VegaISA::VEGAGPUStaticInst
ScalarRegU32 _srcLiteral
 if the instruction has a src literal - an immediate value that is part of the instruction stream - we store that here
Protected Attributes inherited from gem5::GPUStaticInst
const std::string _opcode
std::string disassembly
int _instNum
int _instAddr
std::vector< OperandInfo > srcOps
std::vector< OperandInfo > dstOps

Additional Inherited Members

Public Types inherited from gem5::GPUStaticInst
enum  OpType { SRC_VEC , SRC_SCALAR , DST_VEC , DST_SCALAR }
typedef int(RegisterManager::* MapRegFn) (Wavefront *, int)
Public Attributes inherited from gem5::GPUStaticInst
enums::StorageClassType executed_as
Static Public Attributes inherited from gem5::GPUStaticInst
static uint64_t dynamic_id_count

Detailed Description

Definition at line 1021 of file op_encodings.hh.

Constructor & Destructor Documentation

◆ Inst_MUBUF()

gem5::VegaISA::Inst_MUBUF::Inst_MUBUF ( InFmt_MUBUF * iFmt,
const std::string & opcode )

Definition at line 1419 of file op_encodings.cc.

References gem5::VegaISA::VEGAGPUStaticInst::_srcLiteral, extData, instData, gem5::GPUStaticInst::opcode(), gem5::GPUStaticInst::setFlag(), and gem5::VegaISA::VEGAGPUStaticInst::VEGAGPUStaticInst().

Referenced by gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_ADD::Inst_MUBUF__BUFFER_ATOMIC_ADD(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_ADD_X2::Inst_MUBUF__BUFFER_ATOMIC_ADD_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_AND::Inst_MUBUF__BUFFER_ATOMIC_AND(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_AND_X2::Inst_MUBUF__BUFFER_ATOMIC_AND_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP_X2::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_DEC::Inst_MUBUF__BUFFER_ATOMIC_DEC(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_DEC_X2::Inst_MUBUF__BUFFER_ATOMIC_DEC_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_INC::Inst_MUBUF__BUFFER_ATOMIC_INC(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_INC_X2::Inst_MUBUF__BUFFER_ATOMIC_INC_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_OR::Inst_MUBUF__BUFFER_ATOMIC_OR(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_OR_X2::Inst_MUBUF__BUFFER_ATOMIC_OR_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SMAX::Inst_MUBUF__BUFFER_ATOMIC_SMAX(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SMAX_X2::Inst_MUBUF__BUFFER_ATOMIC_SMAX_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SMIN::Inst_MUBUF__BUFFER_ATOMIC_SMIN(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SMIN_X2::Inst_MUBUF__BUFFER_ATOMIC_SMIN_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SUB::Inst_MUBUF__BUFFER_ATOMIC_SUB(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SUB_X2::Inst_MUBUF__BUFFER_ATOMIC_SUB_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SWAP::Inst_MUBUF__BUFFER_ATOMIC_SWAP(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SWAP_X2::Inst_MUBUF__BUFFER_ATOMIC_SWAP_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_UMAX::Inst_MUBUF__BUFFER_ATOMIC_UMAX(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_UMAX_X2::Inst_MUBUF__BUFFER_ATOMIC_UMAX_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_UMIN::Inst_MUBUF__BUFFER_ATOMIC_UMIN(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_UMIN_X2::Inst_MUBUF__BUFFER_ATOMIC_UMIN_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_XOR::Inst_MUBUF__BUFFER_ATOMIC_XOR(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_XOR_X2::Inst_MUBUF__BUFFER_ATOMIC_XOR_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORD::Inst_MUBUF__BUFFER_LOAD_DWORD(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX2::Inst_MUBUF__BUFFER_LOAD_DWORDX2(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX3::Inst_MUBUF__BUFFER_LOAD_DWORDX3(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX4::Inst_MUBUF__BUFFER_LOAD_DWORDX4(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_D16_X::Inst_MUBUF__BUFFER_LOAD_FORMAT_D16_X(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_D16_XY::Inst_MUBUF__BUFFER_LOAD_FORMAT_D16_XY(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_D16_XYZ::Inst_MUBUF__BUFFER_LOAD_FORMAT_D16_XYZ(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_D16_XYZW::Inst_MUBUF__BUFFER_LOAD_FORMAT_D16_XYZW(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_X::Inst_MUBUF__BUFFER_LOAD_FORMAT_X(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_XY::Inst_MUBUF__BUFFER_LOAD_FORMAT_XY(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_XYZ::Inst_MUBUF__BUFFER_LOAD_FORMAT_XYZ(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_FORMAT_XYZW::Inst_MUBUF__BUFFER_LOAD_FORMAT_XYZW(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SBYTE::Inst_MUBUF__BUFFER_LOAD_SBYTE(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16::Inst_MUBUF__BUFFER_LOAD_SHORT_D16(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16_HI::Inst_MUBUF__BUFFER_LOAD_SHORT_D16_HI(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SSHORT::Inst_MUBUF__BUFFER_LOAD_SSHORT(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_UBYTE::Inst_MUBUF__BUFFER_LOAD_UBYTE(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_USHORT::Inst_MUBUF__BUFFER_LOAD_USHORT(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_BYTE::Inst_MUBUF__BUFFER_STORE_BYTE(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORD::Inst_MUBUF__BUFFER_STORE_DWORD(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX2::Inst_MUBUF__BUFFER_STORE_DWORDX2(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX3::Inst_MUBUF__BUFFER_STORE_DWORDX3(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX4::Inst_MUBUF__BUFFER_STORE_DWORDX4(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_D16_X::Inst_MUBUF__BUFFER_STORE_FORMAT_D16_X(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_D16_XY::Inst_MUBUF__BUFFER_STORE_FORMAT_D16_XY(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_D16_XYZ::Inst_MUBUF__BUFFER_STORE_FORMAT_D16_XYZ(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_D16_XYZW::Inst_MUBUF__BUFFER_STORE_FORMAT_D16_XYZW(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_X::Inst_MUBUF__BUFFER_STORE_FORMAT_X(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_XY::Inst_MUBUF__BUFFER_STORE_FORMAT_XY(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_XYZ::Inst_MUBUF__BUFFER_STORE_FORMAT_XYZ(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_FORMAT_XYZW::Inst_MUBUF__BUFFER_STORE_FORMAT_XYZW(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_LDS_DWORD::Inst_MUBUF__BUFFER_STORE_LDS_DWORD(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_SHORT::Inst_MUBUF__BUFFER_STORE_SHORT(), gem5::VegaISA::Inst_MUBUF__BUFFER_WBINVL1::Inst_MUBUF__BUFFER_WBINVL1(), and gem5::VegaISA::Inst_MUBUF__BUFFER_WBINVL1_VOL::Inst_MUBUF__BUFFER_WBINVL1_VOL().

◆ ~Inst_MUBUF()

gem5::VegaISA::Inst_MUBUF::~Inst_MUBUF ( )

Definition at line 1435 of file op_encodings.cc.

Member Function Documentation

◆ calcAddr()

template<typename VOFF, typename VIDX, typename SRSRC, typename SOFF>
void gem5::VegaISA::Inst_MUBUF::calcAddr ( GPUDynInstPtr gpuDynInst,
VOFF v_off,
VIDX v_idx,
SRSRC s_rsrc_desc,
SOFF s_offset,
int inst_offset )
inlineprotected

MUBUF insructions calculate their addresses as follows:

index = (IDXEN ? vgpr_idx : 0) + (const_add_tid_en ? TID : 0) offset = (OFFEN ? vgpr_off : 0) + inst_off

/ ====================== LINEAR ADDRESSING ====================== / VADDR = base + sgpr_off + offset + stride * index

/ ===================== SWIZZLED ADDRESSING ===================== / index_msb = index / const_index_stride index_lsb = index % const_index_stride offset_msb = offset / const_element_size offset_lsb = offset % const_element_size buffer_offset = ((index_msb * stride + offset_msb * const_element_size) * const_index_stride + index_lsb * const_element_size + offset_lsb)

VADDR = base + sgpr_off + buffer_offset

first we calculate the buffer's index and offset. these will be used for either linear or swizzled buffers.

Range check behavior causes out of range accesses to to be treated differently. Out of range accesses return 0 for loads and are ignored for stores. For non-formatted accesses, this is done on a per-lane basis.

Definition at line 1136 of file op_encodings.hh.

References gem5::VegaISA::BufferRsrcDescriptor::addTidEn, gem5::VegaISA::BufferRsrcDescriptor::baseAddr, gem5::VegaISA::BufferRsrcDescriptor::dataFmt, DPRINTF, gem5::VegaISA::BufferRsrcDescriptor::elemSize, gem5::VegaISA::BufferRsrcDescriptor::idxStride, gem5::VegaISA::BufferRsrcDescriptor::numRecords, gem5::VegaISA::NumVecElemPerVecReg(), oobMask, gem5::ArmISA::stride, gem5::VegaISA::BufferRsrcDescriptor::stride, gem5::VegaISA::BufferRsrcDescriptor::swizzleEn, and gem5::MipsISA::vaddr.

Referenced by gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORD::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX2::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX3::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX4::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16_HI::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_UBYTE::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_USHORT::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_BYTE::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORD::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX2::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX3::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX4::execute(), and gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_SHORT::execute().

◆ generateDisassembly()

void gem5::VegaISA::Inst_MUBUF::generateDisassembly ( )
overridevirtual

Implements gem5::GPUStaticInst.

Definition at line 1493 of file op_encodings.cc.

References gem5::GPUStaticInst::_opcode, gem5::GPUStaticInst::disassembly, extData, and instData.

◆ initAtomicAccess()

template<typename T>
void gem5::VegaISA::Inst_MUBUF::initAtomicAccess ( GPUDynInstPtr gpuDynInst)
inlineprotected

Definition at line 1088 of file op_encodings.hh.

References gem5::initMemReqHelper(), oobMask, and gem5::MemCmd::SwapReq.

Referenced by gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP::initiateAcc().

◆ initMemRead() [1/2]

template<typename T>
void gem5::VegaISA::Inst_MUBUF::initMemRead ( GPUDynInstPtr gpuDynInst)
inlineprotected

Definition at line 1035 of file op_encodings.hh.

References gem5::initMemReqHelper(), oobMask, and gem5::MemCmd::ReadReq.

Referenced by gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORD::initiateAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX2::initiateAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX3::initiateAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX4::initiateAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16::initiateAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16_HI::initiateAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_UBYTE::initiateAcc(), and gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_USHORT::initiateAcc().

◆ initMemRead() [2/2]

template<int N>
void gem5::VegaISA::Inst_MUBUF::initMemRead ( GPUDynInstPtr gpuDynInst)
inlineprotected

Definition at line 1049 of file op_encodings.hh.

References gem5::initMemReqHelper(), oobMask, and gem5::MemCmd::ReadReq.

◆ initMemWrite() [1/2]

template<typename T>
void gem5::VegaISA::Inst_MUBUF::initMemWrite ( GPUDynInstPtr gpuDynInst)
inlineprotected

Definition at line 1062 of file op_encodings.hh.

References gem5::initMemReqHelper(), oobMask, and gem5::MemCmd::WriteReq.

Referenced by gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_BYTE::initiateAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORD::initiateAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX2::initiateAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX3::initiateAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX4::initiateAcc(), and gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_SHORT::initiateAcc().

◆ initMemWrite() [2/2]

template<int N>
void gem5::VegaISA::Inst_MUBUF::initMemWrite ( GPUDynInstPtr gpuDynInst)
inlineprotected

Definition at line 1075 of file op_encodings.hh.

References gem5::initMemReqHelper(), oobMask, and gem5::MemCmd::WriteReq.

◆ initOperandInfo()

void gem5::VegaISA::Inst_MUBUF::initOperandInfo ( )
overridevirtual

Implements gem5::GPUStaticInst.

Definition at line 1440 of file op_encodings.cc.

References gem5::GPUStaticInst::dstOps, extData, gem5::GPUStaticInst::getNumOperands(), gem5::VegaISA::VEGAGPUStaticInst::getOperandSize(), gem5::VegaISA::isScalarReg(), gem5::GPUStaticInst::numDstRegOperands(), gem5::GPUStaticInst::numSrcRegOperands(), gem5::X86ISA::reg, and gem5::GPUStaticInst::srcOps.

◆ injectGlobalMemFence()

void gem5::VegaISA::Inst_MUBUF::injectGlobalMemFence ( GPUDynInstPtr gpuDynInst)
inlineprotected

Definition at line 1100 of file op_encodings.hh.

References injectGlobalMemFence().

Referenced by gem5::VegaISA::Inst_MUBUF__BUFFER_WBINVL1::initiateAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_WBINVL1_VOL::initiateAcc(), and injectGlobalMemFence().

◆ instSize()

int gem5::VegaISA::Inst_MUBUF::instSize ( ) const
overridevirtual

Implements gem5::GPUStaticInst.

Definition at line 1487 of file op_encodings.cc.

Member Data Documentation

◆ extData

InFmt_MUBUF_1 gem5::VegaISA::Inst_MUBUF::extData
protected

Definition at line 1238 of file op_encodings.hh.

Referenced by gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORD::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX2::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX3::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX4::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16_HI::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_UBYTE::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_USHORT::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORD::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX2::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX3::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX4::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16_HI::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_UBYTE::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_USHORT::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_BYTE::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORD::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX2::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX3::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX4::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_SHORT::execute(), generateDisassembly(), initOperandInfo(), and Inst_MUBUF().

◆ instData

InFmt_MUBUF gem5::VegaISA::Inst_MUBUF::instData
protected

Definition at line 1236 of file op_encodings.hh.

Referenced by gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORD::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX2::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX3::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX4::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16_HI::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_UBYTE::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_USHORT::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_BYTE::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORD::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX2::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX3::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX4::execute(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_SHORT::execute(), generateDisassembly(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_UBYTE::getOperandSize(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_BYTE::getOperandSize(), Inst_MUBUF(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_ADD::Inst_MUBUF__BUFFER_ATOMIC_ADD(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_ADD_X2::Inst_MUBUF__BUFFER_ATOMIC_ADD_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_AND::Inst_MUBUF__BUFFER_ATOMIC_AND(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_AND_X2::Inst_MUBUF__BUFFER_ATOMIC_AND_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP_X2::Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_DEC::Inst_MUBUF__BUFFER_ATOMIC_DEC(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_DEC_X2::Inst_MUBUF__BUFFER_ATOMIC_DEC_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_INC::Inst_MUBUF__BUFFER_ATOMIC_INC(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_INC_X2::Inst_MUBUF__BUFFER_ATOMIC_INC_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_OR::Inst_MUBUF__BUFFER_ATOMIC_OR(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_OR_X2::Inst_MUBUF__BUFFER_ATOMIC_OR_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SMAX::Inst_MUBUF__BUFFER_ATOMIC_SMAX(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SMAX_X2::Inst_MUBUF__BUFFER_ATOMIC_SMAX_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SMIN::Inst_MUBUF__BUFFER_ATOMIC_SMIN(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SMIN_X2::Inst_MUBUF__BUFFER_ATOMIC_SMIN_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SUB::Inst_MUBUF__BUFFER_ATOMIC_SUB(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SUB_X2::Inst_MUBUF__BUFFER_ATOMIC_SUB_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SWAP::Inst_MUBUF__BUFFER_ATOMIC_SWAP(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_SWAP_X2::Inst_MUBUF__BUFFER_ATOMIC_SWAP_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_UMAX::Inst_MUBUF__BUFFER_ATOMIC_UMAX(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_UMAX_X2::Inst_MUBUF__BUFFER_ATOMIC_UMAX_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_UMIN::Inst_MUBUF__BUFFER_ATOMIC_UMIN(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_UMIN_X2::Inst_MUBUF__BUFFER_ATOMIC_UMIN_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_XOR::Inst_MUBUF__BUFFER_ATOMIC_XOR(), gem5::VegaISA::Inst_MUBUF__BUFFER_ATOMIC_XOR_X2::Inst_MUBUF__BUFFER_ATOMIC_XOR_X2(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORD::Inst_MUBUF__BUFFER_LOAD_DWORD(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX2::Inst_MUBUF__BUFFER_LOAD_DWORDX2(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX3::Inst_MUBUF__BUFFER_LOAD_DWORDX3(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX4::Inst_MUBUF__BUFFER_LOAD_DWORDX4(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16::Inst_MUBUF__BUFFER_LOAD_SHORT_D16(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16_HI::Inst_MUBUF__BUFFER_LOAD_SHORT_D16_HI(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_UBYTE::Inst_MUBUF__BUFFER_LOAD_UBYTE(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_USHORT::Inst_MUBUF__BUFFER_LOAD_USHORT(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_BYTE::Inst_MUBUF__BUFFER_STORE_BYTE(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORD::Inst_MUBUF__BUFFER_STORE_DWORD(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX2::Inst_MUBUF__BUFFER_STORE_DWORDX2(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX3::Inst_MUBUF__BUFFER_STORE_DWORDX3(), gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_DWORDX4::Inst_MUBUF__BUFFER_STORE_DWORDX4(), and gem5::VegaISA::Inst_MUBUF__BUFFER_STORE_SHORT::Inst_MUBUF__BUFFER_STORE_SHORT().

◆ oobMask

VectorMask gem5::VegaISA::Inst_MUBUF::oobMask
protected

Definition at line 1242 of file op_encodings.hh.

Referenced by calcAddr(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORD::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX2::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX3::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_DWORDX4::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_SHORT_D16_HI::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_UBYTE::completeAcc(), gem5::VegaISA::Inst_MUBUF__BUFFER_LOAD_USHORT::completeAcc(), initAtomicAccess(), initMemRead(), and initMemWrite().

The documentation for this class was generated from the following files:
Generated on Sat Oct 18 2025 08:07:15 for gem5 by doxygen 1.14.0