TarmacTracer Record: Record generated by the TarmacTracer for every executed instruction. More...

#include <tarmac_record.hh>

Inheritance diagram for gem5::trace::TarmacTracerRecord:

Classes
struct	TraceInstEntry
	Instruction Entry. More...
struct	TraceMemEntry
	Memory Entry. More...
struct	TraceRegEntry
	Register Entry. More...

Public Types
using	InstPtr = std::unique_ptr<TraceInstEntry>
using	MemPtr = std::unique_ptr<TraceMemEntry>
using	RegPtr = std::unique_ptr<TraceRegEntry>
Public Types inherited from gem5::trace::TarmacBaseRecord
enum	TarmacRecordType { TARMAC_INST , TARMAC_REG , TARMAC_MEM , TARMAC_UNSUPPORTED }
	TARMAC trace record type. More...
enum	ISetState { ISET_ARM , ISET_THUMB , ISET_A64 , ISET_UNSUPPORTED }
	ARM instruction set state. More...
enum	RegType { REG_R , REG_X , REG_S , REG_D , REG_P , REG_Q , REG_Z , REG_MISC }
	ARM register type. More...

Public Member Functions
	TarmacTracerRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, TarmacTracer &_tracer, const StaticInstPtr _macroStaticInst=NULL)
virtual void	dump () override
Public Member Functions inherited from gem5::trace::TarmacBaseRecord
	TarmacBaseRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, const StaticInstPtr _macroStaticInst=nullptr)
Public Member Functions inherited from gem5::trace::InstRecord
	InstRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, const StaticInstPtr _macroStaticInst=nullptr)
virtual	~InstRecord ()
void	setWhen (Tick new_when)
void	setMem (Addr a, Addr s, unsigned f)
template<typename T, size_t N>
void	setData (std::array< T, N > d)
void	setData (uint64_t d)
void	setData (uint32_t d)
void	setData (uint16_t d)
void	setData (uint8_t d)
void	setData (int64_t d)
void	setData (int32_t d)
void	setData (int16_t d)
void	setData (int8_t d)
void	setData (double d)
void	setData (const RegClass &reg_class, RegVal val)
void	setData (const RegClass &reg_class, const void *val)
void	setFetchSeq (InstSeqNum seq)
void	setCPSeq (InstSeqNum seq)
void	setPredicate (bool val)
void	setFaulting (bool val)
Tick	getWhen () const
ThreadContext *	getThread () const
StaticInstPtr	getStaticInst () const
const PCStateBase &	getPCState () const
StaticInstPtr	getMacroStaticInst () const
Addr	getAddr () const
Addr	getSize () const
unsigned	getFlags () const
bool	getMemValid () const
uint64_t	getIntData () const
double	getFloatData () const
int	getDataStatus () const
InstSeqNum	getFetchSeq () const
bool	getFetchSeqValid () const
InstSeqNum	getCpSeq () const
bool	getCpSeqValid () const
bool	getFaulting () const

Protected Member Functions
virtual void	addInstEntry (std::vector< InstPtr > &queue, const TarmacContext &ptr)
	Generates an Entry for the executed instruction.
virtual void	addMemEntry (std::vector< MemPtr > &queue, const TarmacContext &ptr)
	Generates an Entry for every triggered memory access.
virtual void	addRegEntry (std::vector< RegPtr > &queue, const TarmacContext &ptr)
	Generate an Entry for every register being written.
template<typename RegEntry>
RegEntry	genRegister (const TarmacContext &tarmCtx, const RegId &reg)
	Generate and update a register entry.
template<typename RegEntry>
void	mergeCCEntry (std::vector< RegPtr > &queue, const TarmacContext &tarmCtx)
template<typename Queue>
void	flushQueues (Queue &queue)
	Flush queues to the trace output.
template<typename Queue, typename... Args>
void	flushQueues (Queue &queue, Args &... args)

Protected Attributes
TarmacTracer &	tracer
	Reference to tracer.
Protected Attributes inherited from gem5::trace::InstRecord
Tick	when
ThreadContext *	thread
StaticInstPtr	staticInst
std::unique_ptr< PCStateBase >	pc
StaticInstPtr	macroStaticInst
Addr	addr = 0
	The address that was accessed.
Addr	size = 0
	The size of the memory request.
unsigned	flags = 0
	The flags that were assigned to the request.
union gem5::trace::InstRecord::Data	data
InstSeqNum	fetch_seq = 0
InstSeqNum	cp_seq = 0
enum gem5::trace::InstRecord::DataStatus	dataStatus = DataInvalid
bool	mem_valid = false
	Are the memory fields in the record valid?
bool	fetch_seq_valid = false
	Are the fetch sequence number fields valid?
bool	cp_seq_valid = false
	Are the commit sequence number fields valid?
bool	predicate = true
	is the predicate for execution this inst true or false (not execed)?
bool	faulting = false
	Did the execution of this instruction fault?

Additional Inherited Members
Static Public Member Functions inherited from gem5::trace::TarmacBaseRecord
static ISetState	pcToISetState (const PCStateBase &pc)
	Returns the Instruction Set State according to the current PCState.
Protected Types inherited from gem5::trace::InstRecord
enum	DataStatus { DataInvalid = 0 , DataInt8 = 1 , DataInt16 = 2 , DataInt32 = 4 , DataInt64 = 8 , DataDouble = 3 , DataReg = 5 }
	What size of data was written? More...

Detailed Description

TarmacTracer Record: Record generated by the TarmacTracer for every executed instruction.

The record is composed by a set of entries, matching the tracing capabilities provided by the Tarmac specifications:

Instruction Entry
Register Entry
Memory Entry

Definition at line 94 of file tarmac_record.hh.

Member Typedef Documentation

◆ InstPtr

using gem5::trace::TarmacTracerRecord::InstPtr = std::unique_ptr<TraceInstEntry>

Definition at line 186 of file tarmac_record.hh.

◆ MemPtr

using gem5::trace::TarmacTracerRecord::MemPtr = std::unique_ptr<TraceMemEntry>

Definition at line 187 of file tarmac_record.hh.

◆ RegPtr

using gem5::trace::TarmacTracerRecord::RegPtr = std::unique_ptr<TraceRegEntry>

Definition at line 188 of file tarmac_record.hh.

Constructor & Destructor Documentation

◆ TarmacTracerRecord()

gem5::trace::TarmacTracerRecord::TarmacTracerRecord	(	Tick	_when,
		ThreadContext *	_thread,
		const StaticInstPtr	_staticInst,
		const PCStateBase &	_pc,
		TarmacTracer &	_tracer,
		const StaticInstPtr	_macroStaticInst = NULL )