gem5::VegaISA::InFmt_VOP3P_MAI_1 Struct Reference

#include <gpu_decoder.hh>

Public Attributes
unsigned int	SRC0: 9
unsigned int	SRC1: 9
unsigned int	SRC2: 9
unsigned int	ACC: 2
unsigned int	BLGP: 3

Detailed Description

Definition at line 1999 of file gpu_decoder.hh.

Member Data Documentation

ACC

unsigned int gem5::VegaISA::InFmt_VOP3P_MAI_1::ACC

Definition at line 2004 of file gpu_decoder.hh.

BLGP

unsigned int gem5::VegaISA::InFmt_VOP3P_MAI_1::BLGP

Definition at line 2005 of file gpu_decoder.hh.

SRC0

unsigned int gem5::VegaISA::InFmt_VOP3P_MAI_1::SRC0

Definition at line 2001 of file gpu_decoder.hh.

SRC1

unsigned int gem5::VegaISA::InFmt_VOP3P_MAI_1::SRC1

Definition at line 2002 of file gpu_decoder.hh.

SRC2

unsigned int gem5::VegaISA::InFmt_VOP3P_MAI_1::SRC2

Definition at line 2003 of file gpu_decoder.hh.

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The documentation for this struct was generated from the following file:

• arch/amdgpu/vega/gpu_decoder.hh