gem5  v19.0.0.0
static_inst.cc
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1 /*
2  * Copyright (c) 2015 RISC-V Foundation
3  * Copyright (c) 2016 The University of Virginia
4  * All rights reserved.
5  *
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9  * notice, this list of conditions and the following disclaimer;
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11  * notice, this list of conditions and the following disclaimer in the
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13  * neither the name of the copyright holders nor the names of its
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15  * this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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28  *
29  * Authors: Maxwell Walter
30  * Alec Roelke
31  */
32 
34 
35 #include "arch/riscv/types.hh"
36 #include "cpu/static_inst.hh"
37 
38 namespace RiscvISA
39 {
40 
41 void
43 {
44  if (flags[IsLastMicroop]) {
45  pcState.uEnd();
46  } else {
47  pcState.uAdvance();
48  }
49 }
50 
51 } // namespace RiscvISA
void advancePC(PCState &pcState) const override
Definition: static_inst.cc:42
std::bitset< Num_Flags > flags
Flag values for this instruction.
Definition: static_inst.hh:97

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