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gem5
v19.0.0.0
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This translation class is used to trigger the data fetch once a timing translation returns the translated physical address. More...
#include <stage2_mmu.hh>
Public Member Functions | |
| Stage2Translation (Stage2MMU &_parent, uint8_t *_data, Event *_event, Addr _oVAddr) | |
| void | markDelayed () |
| Signal that the translation has been delayed due to a hw page table walk. More... | |
| void | finish (const Fault &fault, const RequestPtr &req, ThreadContext *tc, BaseTLB::Mode mode) |
| void | setVirt (Addr vaddr, int size, Request::Flags flags, int masterId) |
| void | translateTiming (ThreadContext *tc) |
Public Member Functions inherited from BaseTLB::Translation | |
| virtual | ~Translation () |
| virtual bool | squashed () const |
| This function is used by the page table walker to determine if it should translate the a pending request or if the underlying request has been squashed. More... | |
Public Attributes | |
| Fault | fault |
Private Attributes | |
| uint8_t * | data |
| int | numBytes |
| RequestPtr | req |
| Event * | event |
| Stage2MMU & | parent |
| Addr | oVAddr |
This translation class is used to trigger the data fetch once a timing translation returns the translated physical address.
Definition at line 70 of file stage2_mmu.hh.
| Stage2MMU::Stage2Translation::Stage2Translation | ( | Stage2MMU & | _parent, |
| uint8_t * | _data, | ||
| Event * | _event, | ||
| Addr | _oVAddr | ||
| ) |
Definition at line 111 of file stage2_mmu.cc.
References req.
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virtual |
Implements BaseTLB::Translation.
Definition at line 120 of file stage2_mmu.cc.
References ArmISA::ArmFault::annotate(), Clocked::clockPeriod(), data, DmaPort::dmaAction(), event, fault, ThreadContext::getCpuPtr(), ArmISA::Stage2MMU::getDMAPort(), Request::NO_ACCESS, NoFault, numBytes, ArmISA::ArmFault::OVA, oVAddr, parent, MemCmd::ReadReq, and ArmISA::ArmFault::S1PTW.
Referenced by markDelayed().
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inlinevirtual |
Signal that the translation has been delayed due to a hw page table walk.
Implements BaseTLB::Translation.
Definition at line 87 of file stage2_mmu.hh.
References finish(), and ArmISA::mode.
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inline |
Definition at line 93 of file stage2_mmu.hh.
Referenced by ArmISA::Stage2MMU::readDataTimed().
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inline |
Definition at line 99 of file stage2_mmu.hh.
References BaseTLB::Read, ArmISA::Stage2MMU::stage2Tlb(), and ArmISA::TLB::translateTiming().
Referenced by ArmISA::Stage2MMU::readDataTimed().
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private |
Definition at line 73 of file stage2_mmu.hh.
Referenced by finish(), and ArmISA::Stage2MMU::getDMAPort().
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private |
Definition at line 76 of file stage2_mmu.hh.
Referenced by finish().
| Fault ArmISA::Stage2MMU::Stage2Translation::fault |
Definition at line 81 of file stage2_mmu.hh.
Referenced by ArmISA::TableWalker::fetchDescriptor(), and finish().
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private |
Definition at line 74 of file stage2_mmu.hh.
Referenced by finish(), and ArmISA::Stage2MMU::getDMAPort().
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private |
Definition at line 78 of file stage2_mmu.hh.
Referenced by finish(), and ArmISA::Stage2MMU::getDMAPort().
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private |
Definition at line 77 of file stage2_mmu.hh.
Referenced by finish().
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private |
Definition at line 75 of file stage2_mmu.hh.
Referenced by Stage2Translation().