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gem5
v19.0.0.0
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#include <table_walker.hh>
Public Types | |
| enum | EntryType { Ignore, PageTable, Section, Reserved } |
| Type of page table entry ARM DDI 0406B: B3-8. More... | |
Public Member Functions | |
| L1Descriptor () | |
| Default ctor. More... | |
| virtual uint64_t | getRawData () const |
| virtual std::string | dbgHeader () const |
| virtual uint8_t | offsetBits () const |
| EntryType | type () const |
| bool | supersection () const |
| Is the page a Supersection (16MB)? More... | |
| Addr | paddr () const |
| Return the physcal address of the entry, bits in position. More... | |
| Addr | paddr (Addr va) const |
| Return the physcal address of the entry, bits in position. More... | |
| Addr | pfn () const |
| Return the physical frame, bits shifted right. More... | |
| bool | global (WalkerState *currState) const |
| Is the translation global (no asid used)? More... | |
| bool | xn () const |
| Is the translation not allow execution? More... | |
| uint8_t | ap () const |
| Three bit access protection flags. More... | |
| TlbEntry::DomainType | domain () const |
| Domain Client/Manager: ARM DDI 0406B: B3-31. More... | |
| Addr | l2Addr () const |
| Address of L2 descriptor if it exists. More... | |
| uint8_t | texcb () const |
| Memory region attributes: ARM DDI 0406B: B3-32. More... | |
| bool | shareable () const |
| If the section is shareable. More... | |
| void | setAp0 () |
| Set access flag that this entry has been touched. More... | |
| bool | dirty () const |
| This entry needs to be written back to memory. More... | |
| bool | secure (bool have_security, WalkerState *currState) const |
| Returns true if this entry targets the secure physical address map. More... | |
Public Member Functions inherited from ArmISA::TableWalker::DescriptorBase | |
| DescriptorBase () | |
Public Attributes | |
| uint32_t | data |
| The raw bits of the entry. More... | |
| bool | _dirty |
| This entry has been modified (access flag set) and needs to be written back to memory. More... | |
Public Attributes inherited from ArmISA::TableWalker::DescriptorBase | |
| LookupLevel | lookupLevel |
| Current lookup level for this descriptor. More... | |
Definition at line 95 of file table_walker.hh.
Type of page table entry ARM DDI 0406B: B3-8.
| Enumerator | |
|---|---|
| Ignore | |
| PageTable | |
| Section | |
| Reserved | |
Definition at line 98 of file table_walker.hh.
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inline |
Default ctor.
Definition at line 113 of file table_walker.hh.
References ArmISA::L1, and ArmISA::TableWalker::DescriptorBase::lookupLevel.
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inlinevirtual |
Three bit access protection flags.
Implements ArmISA::TableWalker::DescriptorBase.
Definition at line 181 of file table_walker.hh.
References bits().
Referenced by ArmISA::TableWalker::doL1Descriptor().
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inlinevirtual |
Implements ArmISA::TableWalker::DescriptorBase.
Definition at line 123 of file table_walker.hh.
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inline |
This entry needs to be written back to memory.
Definition at line 224 of file table_walker.hh.
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inlinevirtual |
Domain Client/Manager: ARM DDI 0406B: B3-31.
Implements ArmISA::TableWalker::DescriptorBase.
Definition at line 187 of file table_walker.hh.
References bits().
Referenced by ArmISA::TableWalker::doL1Descriptor(), ArmISA::TableWalker::doL2Descriptor(), and ArmISA::TableWalker::L2Descriptor::domain().
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inlinevirtual |
Implements ArmISA::TableWalker::DescriptorBase.
Definition at line 118 of file table_walker.hh.
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inlinevirtual |
Is the translation global (no asid used)?
Implements ArmISA::TableWalker::DescriptorBase.
Definition at line 169 of file table_walker.hh.
References bits().
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inline |
Address of L2 descriptor if it exists.
Definition at line 193 of file table_walker.hh.
References mbits().
Referenced by ArmISA::TableWalker::doL1Descriptor().
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inlinevirtual |
Implements ArmISA::TableWalker::DescriptorBase.
Definition at line 128 of file table_walker.hh.
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inline |
Return the physcal address of the entry, bits in position.
Definition at line 145 of file table_walker.hh.
Return the physcal address of the entry, bits in position.
Definition at line 152 of file table_walker.hh.
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inlinevirtual |
Return the physical frame, bits shifted right.
Implements ArmISA::TableWalker::DescriptorBase.
Definition at line 161 of file table_walker.hh.
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inlinevirtual |
Returns true if this entry targets the secure physical address map.
Implements ArmISA::TableWalker::DescriptorBase.
Definition at line 233 of file table_walker.hh.
Referenced by ArmISA::TableWalker::L2Descriptor::secure().
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inline |
Set access flag that this entry has been touched.
Mark the entry as requiring a writeback, in the future.
Definition at line 217 of file table_walker.hh.
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inlinevirtual |
If the section is shareable.
See texcb() comment.
Reimplemented from ArmISA::TableWalker::DescriptorBase.
Definition at line 209 of file table_walker.hh.
References bits().
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inline |
Is the page a Supersection (16MB)?
Definition at line 139 of file table_walker.hh.
References bits().
Referenced by ArmISA::TableWalker::doL1Descriptor().
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inlinevirtual |
Memory region attributes: ARM DDI 0406B: B3-32.
These bits are largly ignored by M5 and only used to provide the illusion that the memory system cares about anything but cachable vs. uncachable.
Reimplemented from ArmISA::TableWalker::DescriptorBase.
Definition at line 203 of file table_walker.hh.
References bits().
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inline |
Definition at line 133 of file table_walker.hh.
Referenced by ArmISA::TableWalker::doL1Descriptor().
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inlinevirtual |
Is the translation not allow execution?
Implements ArmISA::TableWalker::DescriptorBase.
Definition at line 175 of file table_walker.hh.
References bits().
| bool ArmISA::TableWalker::L1Descriptor::_dirty |
This entry has been modified (access flag set) and needs to be written back to memory.
Definition at line 110 of file table_walker.hh.
| uint32_t ArmISA::TableWalker::L1Descriptor::data |
The raw bits of the entry.
Definition at line 106 of file table_walker.hh.
Referenced by ArmISA::TableWalker::doL1Descriptor(), ArmISA::TableWalker::doL1DescriptorWrapper(), and ArmISA::TableWalker::processWalk().