gem5  v19.0.0.0
Public Types | Public Member Functions | Public Attributes | List of all members
ArmISA::TableWalker::L1Descriptor Class Reference

#include <table_walker.hh>

Inheritance diagram for ArmISA::TableWalker::L1Descriptor:
ArmISA::TableWalker::DescriptorBase

Public Types

enum  EntryType { Ignore, PageTable, Section, Reserved }
 Type of page table entry ARM DDI 0406B: B3-8. More...
 

Public Member Functions

 L1Descriptor ()
 Default ctor. More...
 
virtual uint64_t getRawData () const
 
virtual std::string dbgHeader () const
 
virtual uint8_t offsetBits () const
 
EntryType type () const
 
bool supersection () const
 Is the page a Supersection (16MB)? More...
 
Addr paddr () const
 Return the physcal address of the entry, bits in position. More...
 
Addr paddr (Addr va) const
 Return the physcal address of the entry, bits in position. More...
 
Addr pfn () const
 Return the physical frame, bits shifted right. More...
 
bool global (WalkerState *currState) const
 Is the translation global (no asid used)? More...
 
bool xn () const
 Is the translation not allow execution? More...
 
uint8_t ap () const
 Three bit access protection flags. More...
 
TlbEntry::DomainType domain () const
 Domain Client/Manager: ARM DDI 0406B: B3-31. More...
 
Addr l2Addr () const
 Address of L2 descriptor if it exists. More...
 
uint8_t texcb () const
 Memory region attributes: ARM DDI 0406B: B3-32. More...
 
bool shareable () const
 If the section is shareable. More...
 
void setAp0 ()
 Set access flag that this entry has been touched. More...
 
bool dirty () const
 This entry needs to be written back to memory. More...
 
bool secure (bool have_security, WalkerState *currState) const
 Returns true if this entry targets the secure physical address map. More...
 
- Public Member Functions inherited from ArmISA::TableWalker::DescriptorBase
 DescriptorBase ()
 

Public Attributes

uint32_t data
 The raw bits of the entry. More...
 
bool _dirty
 This entry has been modified (access flag set) and needs to be written back to memory. More...
 
- Public Attributes inherited from ArmISA::TableWalker::DescriptorBase
LookupLevel lookupLevel
 Current lookup level for this descriptor. More...
 

Detailed Description

Definition at line 95 of file table_walker.hh.

Member Enumeration Documentation

◆ EntryType

Type of page table entry ARM DDI 0406B: B3-8.

Enumerator
Ignore 
PageTable 
Section 
Reserved 

Definition at line 98 of file table_walker.hh.

Constructor & Destructor Documentation

◆ L1Descriptor()

ArmISA::TableWalker::L1Descriptor::L1Descriptor ( )
inline

Default ctor.

Definition at line 113 of file table_walker.hh.

References ArmISA::L1, and ArmISA::TableWalker::DescriptorBase::lookupLevel.

Member Function Documentation

◆ ap()

uint8_t ArmISA::TableWalker::L1Descriptor::ap ( ) const
inlinevirtual

Three bit access protection flags.

Implements ArmISA::TableWalker::DescriptorBase.

Definition at line 181 of file table_walker.hh.

References bits().

Referenced by ArmISA::TableWalker::doL1Descriptor().

◆ dbgHeader()

virtual std::string ArmISA::TableWalker::L1Descriptor::dbgHeader ( ) const
inlinevirtual

Implements ArmISA::TableWalker::DescriptorBase.

Definition at line 123 of file table_walker.hh.

◆ dirty()

bool ArmISA::TableWalker::L1Descriptor::dirty ( ) const
inline

This entry needs to be written back to memory.

Definition at line 224 of file table_walker.hh.

◆ domain()

TlbEntry::DomainType ArmISA::TableWalker::L1Descriptor::domain ( ) const
inlinevirtual

Domain Client/Manager: ARM DDI 0406B: B3-31.

Implements ArmISA::TableWalker::DescriptorBase.

Definition at line 187 of file table_walker.hh.

References bits().

Referenced by ArmISA::TableWalker::doL1Descriptor(), ArmISA::TableWalker::doL2Descriptor(), and ArmISA::TableWalker::L2Descriptor::domain().

◆ getRawData()

virtual uint64_t ArmISA::TableWalker::L1Descriptor::getRawData ( ) const
inlinevirtual

Implements ArmISA::TableWalker::DescriptorBase.

Definition at line 118 of file table_walker.hh.

◆ global()

bool ArmISA::TableWalker::L1Descriptor::global ( WalkerState currState) const
inlinevirtual

Is the translation global (no asid used)?

Implements ArmISA::TableWalker::DescriptorBase.

Definition at line 169 of file table_walker.hh.

References bits().

◆ l2Addr()

Addr ArmISA::TableWalker::L1Descriptor::l2Addr ( ) const
inline

Address of L2 descriptor if it exists.

Definition at line 193 of file table_walker.hh.

References mbits().

Referenced by ArmISA::TableWalker::doL1Descriptor().

◆ offsetBits()

virtual uint8_t ArmISA::TableWalker::L1Descriptor::offsetBits ( ) const
inlinevirtual

Implements ArmISA::TableWalker::DescriptorBase.

Definition at line 128 of file table_walker.hh.

◆ paddr() [1/2]

Addr ArmISA::TableWalker::L1Descriptor::paddr ( ) const
inline

Return the physcal address of the entry, bits in position.

Definition at line 145 of file table_walker.hh.

References mbits(), and panic.

◆ paddr() [2/2]

Addr ArmISA::TableWalker::L1Descriptor::paddr ( Addr  va) const
inline

Return the physcal address of the entry, bits in position.

Definition at line 152 of file table_walker.hh.

References mbits(), and panic.

◆ pfn()

Addr ArmISA::TableWalker::L1Descriptor::pfn ( ) const
inlinevirtual

Return the physical frame, bits shifted right.

Implements ArmISA::TableWalker::DescriptorBase.

Definition at line 161 of file table_walker.hh.

References bits(), and panic.

◆ secure()

bool ArmISA::TableWalker::L1Descriptor::secure ( bool  have_security,
WalkerState currState 
) const
inlinevirtual

Returns true if this entry targets the secure physical address map.

Implements ArmISA::TableWalker::DescriptorBase.

Definition at line 233 of file table_walker.hh.

References bits(), and type.

Referenced by ArmISA::TableWalker::L2Descriptor::secure().

◆ setAp0()

void ArmISA::TableWalker::L1Descriptor::setAp0 ( )
inline

Set access flag that this entry has been touched.

Mark the entry as requiring a writeback, in the future.

Definition at line 217 of file table_walker.hh.

◆ shareable()

bool ArmISA::TableWalker::L1Descriptor::shareable ( ) const
inlinevirtual

If the section is shareable.

See texcb() comment.

Reimplemented from ArmISA::TableWalker::DescriptorBase.

Definition at line 209 of file table_walker.hh.

References bits().

◆ supersection()

bool ArmISA::TableWalker::L1Descriptor::supersection ( ) const
inline

Is the page a Supersection (16MB)?

Definition at line 139 of file table_walker.hh.

References bits().

Referenced by ArmISA::TableWalker::doL1Descriptor().

◆ texcb()

uint8_t ArmISA::TableWalker::L1Descriptor::texcb ( ) const
inlinevirtual

Memory region attributes: ARM DDI 0406B: B3-32.

These bits are largly ignored by M5 and only used to provide the illusion that the memory system cares about anything but cachable vs. uncachable.

Reimplemented from ArmISA::TableWalker::DescriptorBase.

Definition at line 203 of file table_walker.hh.

References bits().

◆ type()

EntryType ArmISA::TableWalker::L1Descriptor::type ( ) const
inline

Definition at line 133 of file table_walker.hh.

Referenced by ArmISA::TableWalker::doL1Descriptor().

◆ xn()

bool ArmISA::TableWalker::L1Descriptor::xn ( ) const
inlinevirtual

Is the translation not allow execution?

Implements ArmISA::TableWalker::DescriptorBase.

Definition at line 175 of file table_walker.hh.

References bits().

Member Data Documentation

◆ _dirty

bool ArmISA::TableWalker::L1Descriptor::_dirty

This entry has been modified (access flag set) and needs to be written back to memory.

Definition at line 110 of file table_walker.hh.

◆ data

uint32_t ArmISA::TableWalker::L1Descriptor::data

The documentation for this class was generated from the following file:

Generated on Fri Feb 28 2020 16:27:20 for gem5 by doxygen 1.8.13