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gem5
v20.1.0.5
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#include <op_encodings.hh>
Public Member Functions | |
| Inst_VOP1 (InFmt_VOP1 *, const std::string &opcode) | |
| ~Inst_VOP1 () | |
| int | instSize () const override |
| void | generateDisassembly () override |
| bool | isScalarRegister (int opIdx) override |
| bool | isVectorRegister (int opIdx) override |
| int | getRegisterIndex (int opIdx, GPUDynInstPtr gpuDynInst) override |
Public Member Functions inherited from Gcn3ISA::GCN3GPUStaticInst | |
| GCN3GPUStaticInst (const std::string &opcode) | |
| ~GCN3GPUStaticInst () | |
| bool | isFlatScratchRegister (int opIdx) override |
| bool | isExecMaskRegister (int opIdx) override |
| bool | isSrcOperand (int opIdx) override |
| bool | isDstOperand (int opIdx) override |
| int | getOperandSize (int opIdx) override |
| int | coalescerTokenCount () const override |
| Return the number of tokens needed by the coalescer. More... | |
| ScalarRegU32 | srcLiteral () const override |
Public Member Functions inherited from GPUStaticInst | |
| GPUStaticInst (const std::string &opcode) | |
| virtual | ~GPUStaticInst () |
| void | instAddr (int inst_addr) |
| int | instAddr () const |
| int | nextInstAddr () const |
| void | instNum (int num) |
| int | instNum () |
| void | ipdInstNum (int num) |
| int | ipdInstNum () const |
| virtual void | execute (GPUDynInstPtr gpuDynInst)=0 |
| const std::string & | disassemble () |
| virtual int | getNumOperands ()=0 |
| virtual int | numDstRegOperands ()=0 |
| virtual int | numSrcRegOperands ()=0 |
| int | numDstVecOperands () |
| int | numSrcVecOperands () |
| int | numDstVecDWORDs () |
| int | numSrcVecDWORDs () |
| int | numOpdDWORDs (int operandIdx) |
| bool | isALU () const |
| bool | isBranch () const |
| bool | isCondBranch () const |
| bool | isNop () const |
| bool | isReturn () const |
| bool | isEndOfKernel () const |
| bool | isKernelLaunch () const |
| bool | isSDWAInst () const |
| bool | isDPPInst () const |
| bool | isUnconditionalJump () const |
| bool | isSpecialOp () const |
| bool | isWaitcnt () const |
| bool | isBarrier () const |
| bool | isMemSync () const |
| bool | isMemRef () const |
| bool | isFlat () const |
| bool | isLoad () const |
| bool | isStore () const |
| bool | isAtomic () const |
| bool | isAtomicNoRet () const |
| bool | isAtomicRet () const |
| bool | isScalar () const |
| bool | readsSCC () const |
| bool | writesSCC () const |
| bool | readsVCC () const |
| bool | writesVCC () const |
| bool | readsEXEC () const |
| bool | writesEXEC () const |
| bool | readsMode () const |
| bool | writesMode () const |
| bool | ignoreExec () const |
| bool | isAtomicAnd () const |
| bool | isAtomicOr () const |
| bool | isAtomicXor () const |
| bool | isAtomicCAS () const |
| bool | isAtomicExch () const |
| bool | isAtomicAdd () const |
| bool | isAtomicSub () const |
| bool | isAtomicInc () const |
| bool | isAtomicDec () const |
| bool | isAtomicMax () const |
| bool | isAtomicMin () const |
| bool | isArgLoad () const |
| bool | isGlobalMem () const |
| bool | isLocalMem () const |
| bool | isArgSeg () const |
| bool | isGlobalSeg () const |
| bool | isGroupSeg () const |
| bool | isKernArgSeg () const |
| bool | isPrivateSeg () const |
| bool | isReadOnlySeg () const |
| bool | isSpillSeg () const |
| bool | isGloballyCoherent () const |
| Coherence domain of a memory instruction. More... | |
| bool | isSystemCoherent () const |
| bool | isF16 () const |
| bool | isF32 () const |
| bool | isF64 () const |
| bool | isFMA () const |
| bool | isMAC () const |
| bool | isMAD () const |
| virtual void | initiateAcc (GPUDynInstPtr gpuDynInst) |
| virtual void | completeAcc (GPUDynInstPtr gpuDynInst) |
| virtual uint32_t | getTargetPc () |
| void | setFlag (Flags flag) |
| const std::string & | opcode () const |
Protected Attributes | |
| InFmt_VOP1 | instData |
| InstFormat | extData |
| uint32_t | varSize |
Protected Attributes inherited from Gcn3ISA::GCN3GPUStaticInst | |
| ScalarRegU32 | _srcLiteral |
| if the instruction has a src literal - an immediate value that is part of the instruction stream - we store that here More... | |
Protected Attributes inherited from GPUStaticInst | |
| const std::string | _opcode |
| std::string | disassembly |
| int | _instNum |
| int | _instAddr |
| int | srcVecOperands |
| int | dstVecOperands |
| int | srcVecDWORDs |
| int | dstVecDWORDs |
| int | _ipdInstNum |
| Identifier of the immediate post-dominator instruction. More... | |
| std::bitset< Num_Flags > | _flags |
Private Member Functions | |
| bool | hasSecondDword (InFmt_VOP1 *) |
Additional Inherited Members | |
Public Attributes inherited from GPUStaticInst | |
| Enums::StorageClassType | executed_as |
Static Public Attributes inherited from GPUStaticInst | |
| static uint64_t | dynamic_id_count |
Protected Member Functions inherited from Gcn3ISA::GCN3GPUStaticInst | |
| void | panicUnimplemented () const |
Definition at line 294 of file op_encodings.hh.
| Gcn3ISA::Inst_VOP1::Inst_VOP1 | ( | InFmt_VOP1 * | iFmt, |
| const std::string & | opcode | ||
| ) |
Definition at line 944 of file op_encodings.cc.
References Gcn3ISA::GCN3GPUStaticInst::_srcLiteral, extData, hasSecondDword(), instData, Gcn3ISA::REG_SRC_DPP, Gcn3ISA::REG_SRC_SWDA, GPUStaticInst::setFlag(), Gcn3ISA::InFmt_VOP1::SRC0, and varSize.
| Gcn3ISA::Inst_VOP1::~Inst_VOP1 | ( | ) |
Definition at line 964 of file op_encodings.cc.
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 994 of file op_encodings.cc.
References GPUStaticInst::_opcode, Gcn3ISA::GCN3GPUStaticInst::_srcLiteral, GPUStaticInst::disassembly, instData, Gcn3ISA::opSelectorToRegSym(), Gcn3ISA::REG_SRC_DPP, Gcn3ISA::REG_SRC_LITERAL, Gcn3ISA::REG_SRC_SWDA, Gcn3ISA::InFmt_VOP1::SRC0, and Gcn3ISA::InFmt_VOP1::VDST.
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 1049 of file op_encodings.cc.
References fatal, GPUStaticInst::getNumOperands(), instData, Gcn3ISA::opSelectorToRegIdx(), Gcn3ISA::InFmt_VOP1::SRC0, and Gcn3ISA::InFmt_VOP1::VDST.
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private |
Definition at line 975 of file op_encodings.cc.
References Gcn3ISA::REG_SRC_DPP, Gcn3ISA::REG_SRC_LITERAL, Gcn3ISA::REG_SRC_SWDA, and Gcn3ISA::InFmt_VOP1::SRC0.
Referenced by Inst_VOP1().
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overridevirtual |
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 1013 of file op_encodings.cc.
References fatal, GPUStaticInst::getNumOperands(), instData, Gcn3ISA::isScalarReg(), and Gcn3ISA::InFmt_VOP1::SRC0.
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overridevirtual |
Reimplemented from Gcn3ISA::GCN3GPUStaticInst.
Definition at line 1031 of file op_encodings.cc.
References fatal, GPUStaticInst::getNumOperands(), instData, Gcn3ISA::isVectorReg(), and Gcn3ISA::InFmt_VOP1::SRC0.
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protected |
Definition at line 311 of file op_encodings.hh.
Referenced by Gcn3ISA::Inst_VOP1__V_MOV_B32::execute(), and Inst_VOP1().
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protected |
Definition at line 309 of file op_encodings.hh.
Referenced by Gcn3ISA::Inst_VOP1__V_MOV_B32::execute(), Gcn3ISA::Inst_VOP1__V_READFIRSTLANE_B32::execute(), Gcn3ISA::Inst_VOP1__V_CVT_I32_F64::execute(), Gcn3ISA::Inst_VOP1__V_CVT_F64_I32::execute(), Gcn3ISA::Inst_VOP1__V_CVT_F32_I32::execute(), Gcn3ISA::Inst_VOP1__V_CVT_F32_U32::execute(), Gcn3ISA::Inst_VOP1__V_CVT_U32_F32::execute(), Gcn3ISA::Inst_VOP1__V_CVT_I32_F32::execute(), Gcn3ISA::Inst_VOP1__V_CVT_RPI_I32_F32::execute(), Gcn3ISA::Inst_VOP1__V_CVT_FLR_I32_F32::execute(), Gcn3ISA::Inst_VOP1__V_CVT_F32_F64::execute(), Gcn3ISA::Inst_VOP1__V_CVT_F64_F32::execute(), Gcn3ISA::Inst_VOP1__V_CVT_F32_UBYTE0::execute(), Gcn3ISA::Inst_VOP1__V_CVT_F32_UBYTE1::execute(), Gcn3ISA::Inst_VOP1__V_CVT_F32_UBYTE2::execute(), Gcn3ISA::Inst_VOP1__V_CVT_F32_UBYTE3::execute(), Gcn3ISA::Inst_VOP1__V_CVT_U32_F64::execute(), Gcn3ISA::Inst_VOP1__V_CVT_F64_U32::execute(), Gcn3ISA::Inst_VOP1__V_TRUNC_F64::execute(), Gcn3ISA::Inst_VOP1__V_CEIL_F64::execute(), Gcn3ISA::Inst_VOP1__V_RNDNE_F64::execute(), Gcn3ISA::Inst_VOP1__V_FLOOR_F64::execute(), Gcn3ISA::Inst_VOP1__V_FRACT_F32::execute(), Gcn3ISA::Inst_VOP1__V_TRUNC_F32::execute(), Gcn3ISA::Inst_VOP1__V_CEIL_F32::execute(), Gcn3ISA::Inst_VOP1__V_RNDNE_F32::execute(), Gcn3ISA::Inst_VOP1__V_FLOOR_F32::execute(), Gcn3ISA::Inst_VOP1__V_EXP_F32::execute(), Gcn3ISA::Inst_VOP1__V_LOG_F32::execute(), Gcn3ISA::Inst_VOP1__V_RCP_F32::execute(), Gcn3ISA::Inst_VOP1__V_RCP_IFLAG_F32::execute(), Gcn3ISA::Inst_VOP1__V_RSQ_F32::execute(), Gcn3ISA::Inst_VOP1__V_RCP_F64::execute(), Gcn3ISA::Inst_VOP1__V_RSQ_F64::execute(), Gcn3ISA::Inst_VOP1__V_SQRT_F32::execute(), Gcn3ISA::Inst_VOP1__V_SQRT_F64::execute(), Gcn3ISA::Inst_VOP1__V_SIN_F32::execute(), Gcn3ISA::Inst_VOP1__V_COS_F32::execute(), Gcn3ISA::Inst_VOP1__V_NOT_B32::execute(), Gcn3ISA::Inst_VOP1__V_BFREV_B32::execute(), Gcn3ISA::Inst_VOP1__V_FFBH_U32::execute(), Gcn3ISA::Inst_VOP1__V_FFBL_B32::execute(), Gcn3ISA::Inst_VOP1__V_FFBH_I32::execute(), Gcn3ISA::Inst_VOP1__V_FREXP_EXP_I32_F64::execute(), Gcn3ISA::Inst_VOP1__V_FREXP_MANT_F64::execute(), Gcn3ISA::Inst_VOP1__V_FRACT_F64::execute(), Gcn3ISA::Inst_VOP1__V_FREXP_EXP_I32_F32::execute(), Gcn3ISA::Inst_VOP1__V_FREXP_MANT_F32::execute(), Gcn3ISA::Inst_VOP1__V_EXP_LEGACY_F32::execute(), Gcn3ISA::Inst_VOP1__V_LOG_LEGACY_F32::execute(), generateDisassembly(), getRegisterIndex(), Inst_VOP1(), isScalarRegister(), and isVectorRegister().
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Definition at line 312 of file op_encodings.hh.
Referenced by Inst_VOP1(), and instSize().