gem5
v21.0.1.0
arch
arm
fs_workload.hh
Go to the documentation of this file.
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/*
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* Copyright (c) 2010, 2012-2013, 2015-2019 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_ARM_FS_WORKLOAD_HH__
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#define __ARCH_ARM_FS_WORKLOAD_HH__
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#include <memory>
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#include <vector>
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#include "
arch/arm/aapcs32.hh
"
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#include "
arch/arm/aapcs64.hh
"
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#include "
kern/linux/events.hh
"
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#include "params/ArmFsWorkload.hh"
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#include "
sim/kernel_workload.hh
"
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#include "
sim/sim_object.hh
"
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namespace
ArmISA
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{
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class
SkipFunc
:
public
SkipFuncBase
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{
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public
:
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using
SkipFuncBase::SkipFuncBase
;
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void
returnFromFuncIn
(
ThreadContext
*tc)
override
;
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};
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class
FsWorkload
:
public
KernelWorkload
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{
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protected
:
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std::vector<std::unique_ptr<Loader::ObjectFile>
>
bootLoaders
;
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Loader::ObjectFile
*
bootldr
=
nullptr
;
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80
Addr
kernelEntry
= 0;
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Loader::ObjectFile
*
getBootLoader
(
Loader::ObjectFile
*
const
obj);
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template
<
template
<
class
ABI,
class
Base>
class
FuncEvent,
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typename
... Args>
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PCEvent
*
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addSkipFunc
(Args... args)
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{
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if
(
getArch
() ==
Loader::Arm64
) {
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return
addKernelFuncEvent<FuncEvent<Aapcs64, SkipFunc>>(
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std::forward<Args>(args)...);
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}
else
{
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return
addKernelFuncEvent<FuncEvent<Aapcs32, SkipFunc>>(
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std::forward<Args>(args)...);
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}
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}
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template
<
template
<
class
ABI,
class
Base>
class
FuncEvent,
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typename
... Args>
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PCEvent
*
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addSkipFuncOrPanic
(Args... args)
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{
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if
(
getArch
() ==
Loader::Arm64
) {
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return
addKernelFuncEventOrPanic<FuncEvent<Aapcs64, SkipFunc>>(
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std::forward<Args>(args)...);
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}
else
{
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return
addKernelFuncEventOrPanic<FuncEvent<Aapcs32, SkipFunc>>(
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std::forward<Args>(args)...);
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}
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}
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public
:
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PARAMS
(ArmFsWorkload);
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Addr
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getEntry
()
const override
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{
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if
(
bootldr
)
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return
bootldr
->
entryPoint
();
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else
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return
kernelEntry
;
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}
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Loader::Arch
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getArch
()
const override
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{
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if
(
bootldr
)
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return
bootldr
->
getArch
();
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else
if
(
kernelObj
)
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return
kernelObj
->
getArch
();
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else
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return
Loader::Arm64
;
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}
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FsWorkload
(
const
Params
&
p
);
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void
initState
()
override
;
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Addr
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fixFuncEventAddr
(
Addr
addr
)
const override
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{
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// Remove the low bit that thumb symbols have set
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// but that aren't actually odd aligned
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return
addr
& ~1;
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}
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};
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}
// namespace ArmISA
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#endif // __ARCH_ARM_FS_WORKLOAD_HH__
events.hh
SimObject::Params
SimObjectParams Params
Definition:
sim_object.hh:162
ArmISA::FsWorkload::getBootLoader
Loader::ObjectFile * getBootLoader(Loader::ObjectFile *const obj)
Get a boot loader that matches the kernel.
Definition:
fs_workload.cc:145
ArmISA::SkipFunc::returnFromFuncIn
void returnFromFuncIn(ThreadContext *tc) override
Definition:
fs_workload.cc:55
aapcs32.hh
KernelWorkload
Definition:
kernel_workload.hh:42
ArmISA::FsWorkload::addSkipFunc
PCEvent * addSkipFunc(Args... args)
Definition:
fs_workload.hh:94
ArmISA::FsWorkload::FsWorkload
FsWorkload(const Params &p)
Definition:
fs_workload.cc:72
ArmISA::FsWorkload::PARAMS
PARAMS(ArmFsWorkload)
ArmISA::FsWorkload::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition:
fs_workload.cc:98
SkipFuncBase
Definition:
system_events.hh:34
ArmISA::FsWorkload::bootldr
Loader::ObjectFile * bootldr
Pointer to the bootloader object.
Definition:
fs_workload.hh:73
std::vector
STL vector class.
Definition:
stl.hh:37
aapcs64.hh
ArmISA
Definition:
ccregs.hh:41
ArmISA::FsWorkload::addSkipFuncOrPanic
PCEvent * addSkipFuncOrPanic(Args... args)
Definition:
fs_workload.hh:108
Loader::ObjectFile
Definition:
object_file.hh:74
Loader::ObjectFile::entryPoint
Addr entryPoint() const
Definition:
object_file.hh:112
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition:
thread_context.hh:88
sim_object.hh
ArmISA::FsWorkload::kernelEntry
Addr kernelEntry
This differs from entry since it takes into account where the kernel is loaded in memory (with loadAd...
Definition:
fs_workload.hh:80
ArmISA::FsWorkload::bootLoaders
std::vector< std::unique_ptr< Loader::ObjectFile > > bootLoaders
Bootloaders.
Definition:
fs_workload.hh:68
ArmISA::FsWorkload
Definition:
fs_workload.hh:64
KernelWorkload::kernelObj
Loader::ObjectFile * kernelObj
Definition:
kernel_workload.hh:66
ArmISA::FsWorkload::getArch
Loader::Arch getArch() const override
Definition:
fs_workload.hh:132
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition:
types.hh:148
X86ISA::addr
Bitfield< 3 > addr
Definition:
types.hh:80
Loader::Arch
Arch
Definition:
object_file.hh:44
Loader::ObjectFile::getArch
Arch getArch() const
Definition:
object_file.hh:103
ArmISA::FsWorkload::getEntry
Addr getEntry() const override
Definition:
fs_workload.hh:123
ArmISA::SkipFunc
Definition:
fs_workload.hh:57
Loader::Arm64
@ Arm64
Definition:
object_file.hh:51
PCEvent
Definition:
pc_event.hh:42
kernel_workload.hh
SkipFuncBase::SkipFuncBase
SkipFuncBase(PCEventScope *s, const std::string &desc, Addr addr)
Definition:
system_events.hh:40
MipsISA::p
Bitfield< 0 > p
Definition:
pra_constants.hh:323
ArmISA::FsWorkload::fixFuncEventAddr
Addr fixFuncEventAddr(Addr addr) const override
Definition:
fs_workload.hh:147
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