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gem5
v21.0.1.0
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Implementaton of AArch64 TLBI VMALLE1(IS)/VMALLS112E1(IS) instructions. More...
#include <tlbi_op.hh>
Public Member Functions | |
| TLBIVMALL (ExceptionLevel _targetEL, bool _secure, bool _stage2) | |
| void | operator() (ThreadContext *tc) override |
| TLBIVMALL | makeStage2 () const |
Public Member Functions inherited from ArmISA::TLBIOp | |
| TLBIOp (ExceptionLevel _targetEL, bool _secure) | |
| virtual | ~TLBIOp () |
| void | broadcast (ThreadContext *tc) |
| Broadcast the TLB Invalidate operation to all TLBs in the Arm system. More... | |
Public Attributes | |
| bool | inHost |
| bool | el2Enabled |
| bool | stage2 |
Public Attributes inherited from ArmISA::TLBIOp | |
| bool | secureLookup |
| ExceptionLevel | targetEL |
Implementaton of AArch64 TLBI VMALLE1(IS)/VMALLS112E1(IS) instructions.
Definition at line 145 of file tlbi_op.hh.
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inline |
Definition at line 148 of file tlbi_op.hh.
Referenced by makeStage2().
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inline |
Definition at line 156 of file tlbi_op.hh.
References ArmISA::EL1, ArmISA::TLBIOp::secureLookup, and TLBIVMALL().
Referenced by ArmISA::TLB::flush().
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overridevirtual |
Reimplemented from ArmISA::TLBIOp.
Definition at line 90 of file tlbi_op.cc.
References ArmISA::MMU::flush(), ThreadContext::getCheckerCpuPtr(), ArmISA::getMMUPtr(), inHost, ArmISA::MISCREG_HCR_EL2, and ThreadContext::readMiscReg().
| bool ArmISA::TLBIVMALL::el2Enabled |
Definition at line 162 of file tlbi_op.hh.
Referenced by ArmISA::TLB::flush().
| bool ArmISA::TLBIVMALL::inHost |
Definition at line 161 of file tlbi_op.hh.
Referenced by ArmISA::TLB::flush(), and operator()().
| bool ArmISA::TLBIVMALL::stage2 |
Definition at line 163 of file tlbi_op.hh.
Referenced by ArmISA::TLB::flush().