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gem5
v21.0.1.0
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#include <tarmac_base.hh>
Classes | |
| struct | InstEntry |
| TARMAC instruction trace record. More... | |
| struct | MemEntry |
| TARMAC memory access trace record (stores only). More... | |
| struct | RegEntry |
| TARMAC register trace record. More... | |
Public Types | |
| enum | TarmacRecordType { TARMAC_INST, TARMAC_REG, TARMAC_MEM, TARMAC_UNSUPPORTED } |
| TARMAC trace record type. More... | |
| enum | ISetState { ISET_ARM, ISET_THUMB, ISET_A64, ISET_UNSUPPORTED } |
| ARM instruction set state. More... | |
| enum | RegType { REG_R, REG_X, REG_S, REG_D, REG_P, REG_Q, REG_Z, REG_MISC } |
| ARM register type. More... | |
Public Member Functions | |
| TarmacBaseRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, ArmISA::PCState _pc, const StaticInstPtr _macroStaticInst=NULL) | |
| virtual void | dump ()=0 |
Public Member Functions inherited from Trace::InstRecord | |
| InstRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, TheISA::PCState _pc, const StaticInstPtr _macroStaticInst=NULL) | |
| virtual | ~InstRecord () |
| void | setWhen (Tick new_when) |
| void | setMem (Addr a, Addr s, unsigned f) |
| template<typename T , size_t N> | |
| void | setData (std::array< T, N > d) |
| void | setData (uint64_t d) |
| void | setData (uint32_t d) |
| void | setData (uint16_t d) |
| void | setData (uint8_t d) |
| void | setData (int64_t d) |
| void | setData (int32_t d) |
| void | setData (int16_t d) |
| void | setData (int8_t d) |
| void | setData (double d) |
| void | setData (::VecRegContainer< TheISA::VecRegSizeBytes > &d) |
| void | setData (::VecPredRegContainer< TheISA::VecPredRegSizeBits, TheISA::VecPredRegHasPackedRepr > &d) |
| void | setFetchSeq (InstSeqNum seq) |
| void | setCPSeq (InstSeqNum seq) |
| void | setPredicate (bool val) |
| void | setFaulting (bool val) |
| Tick | getWhen () const |
| ThreadContext * | getThread () const |
| StaticInstPtr | getStaticInst () const |
| TheISA::PCState | getPCState () const |
| StaticInstPtr | getMacroStaticInst () const |
| Addr | getAddr () const |
| Addr | getSize () const |
| unsigned | getFlags () const |
| bool | getMemValid () const |
| uint64_t | getIntData () const |
| double | getFloatData () const |
| int | getDataStatus () const |
| InstSeqNum | getFetchSeq () const |
| bool | getFetchSeqValid () const |
| InstSeqNum | getCpSeq () const |
| bool | getCpSeqValid () const |
| bool | getFaulting () const |
Static Public Member Functions | |
| static ISetState | pcToISetState (ArmISA::PCState pc) |
| Returns the Instruction Set State according to the current PCState. More... | |
Additional Inherited Members | |
Protected Types inherited from Trace::InstRecord | |
| enum | DataStatus { DataInvalid = 0, DataInt8 = 1, DataInt16 = 2, DataInt32 = 4, DataInt64 = 8, DataDouble = 3, DataVec = 5, DataVecPred = 6 } |
Protected Attributes inherited from Trace::InstRecord | |
| Tick | when |
| ThreadContext * | thread |
| StaticInstPtr | staticInst |
| TheISA::PCState | pc |
| StaticInstPtr | macroStaticInst |
| Addr | addr |
| The address that was accessed. More... | |
| Addr | size |
| The size of the memory request. More... | |
| unsigned | flags |
| The flags that were assigned to the request. More... | |
| union { | |
| uint64_t as_int | |
| double as_double | |
| ::VecRegContainer< TheISA::VecRegSizeBytes > * as_vec | |
| ::VecPredRegContainer< TheISA::VecPredRegSizeBits, TheISA::VecPredRegHasPackedRepr > * as_pred | |
| } | data |
| InstSeqNum | fetch_seq |
| InstSeqNum | cp_seq |
| enum Trace::InstRecord::DataStatus | data_status |
| bool | mem_valid |
| bool | fetch_seq_valid |
| bool | cp_seq_valid |
| bool | predicate |
| is the predicate for execution this inst true or false (not execed)? More... | |
| bool | faulting |
| Did the execution of this instruction fault? (requires ExecFaulting to be enabled) More... | |
Definition at line 62 of file tarmac_base.hh.
ARM instruction set state.
| Enumerator | |
|---|---|
| ISET_ARM | |
| ISET_THUMB | |
| ISET_A64 | |
| ISET_UNSUPPORTED | |
Definition at line 74 of file tarmac_base.hh.
ARM register type.
| Enumerator | |
|---|---|
| REG_R | |
| REG_X | |
| REG_S | |
| REG_D | |
| REG_P | |
| REG_Q | |
| REG_Z | |
| REG_MISC | |
Definition at line 78 of file tarmac_base.hh.
TARMAC trace record type.
| Enumerator | |
|---|---|
| TARMAC_INST | |
| TARMAC_REG | |
| TARMAC_MEM | |
| TARMAC_UNSUPPORTED | |
Definition at line 66 of file tarmac_base.hh.
| Trace::TarmacBaseRecord::TarmacBaseRecord | ( | Tick | _when, |
| ThreadContext * | _thread, | ||
| const StaticInstPtr | _staticInst, | ||
| ArmISA::PCState | _pc, | ||
| const StaticInstPtr | _macroStaticInst = NULL |
||
| ) |
Definition at line 52 of file tarmac_base.cc.
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pure virtual |
Implements Trace::InstRecord.
Implemented in Trace::TarmacTracerRecord, and Trace::TarmacParserRecord.
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static |
Returns the Instruction Set State according to the current PCState.
| pc | program counter (PCState) variable |
Definition at line 100 of file tarmac_base.cc.
References ISET_A64, ISET_ARM, ISET_THUMB, ISET_UNSUPPORTED, and Trace::InstRecord::pc.
Referenced by Trace::TarmacParserRecord::dump().