|
gem5
v21.0.1.0
|
#include "base/statistics.hh"#include "dev/io_device.hh"#include "dev/storage/disk_image.hh"#include "dev/storage/ide_atareg.h"#include "dev/storage/ide_ctrl.hh"#include "dev/storage/ide_wdcreg.h"#include "params/IdeDisk.hh"#include "sim/eventq.hh"Go to the source code of this file.
Classes | |
| struct | PrdEntry |
| class | PrdTableEntry |
| struct | CommandReg |
| class | IdeDisk |
| IDE Disk device model. More... | |
| struct | IdeDisk::IdeDiskStats |
Macros | |
| #define | DMA_BACKOFF_PERIOD 200 |
| #define | MAX_DMA_SIZE 0x20000 |
| #define | MAX_SINGLE_DMA_SIZE 0x10000 |
| #define | MAX_MULTSECT (128) |
| #define | PRD_BASE_MASK 0xfffffffe |
| #define | PRD_COUNT_MASK 0xfffe |
| #define | PRD_EOT_MASK 0x8000 |
| #define | DATA_OFFSET (0) |
| #define | ERROR_OFFSET (1) |
| #define | FEATURES_OFFSET (1) |
| #define | NSECTOR_OFFSET (2) |
| #define | SECTOR_OFFSET (3) |
| #define | LCYL_OFFSET (4) |
| #define | HCYL_OFFSET (5) |
| #define | SELECT_OFFSET (6) |
| #define | DRIVE_OFFSET (6) |
| #define | STATUS_OFFSET (7) |
| #define | COMMAND_OFFSET (7) |
| #define | CONTROL_OFFSET (2) |
| #define | ALTSTAT_OFFSET (2) |
| #define | SELECT_DEV_BIT 0x10 |
| #define | CONTROL_RST_BIT 0x04 |
| #define | CONTROL_IEN_BIT 0x02 |
| #define | STATUS_BSY_BIT 0x80 |
| #define | STATUS_DRDY_BIT 0x40 |
| #define | STATUS_DRQ_BIT 0x08 |
| #define | STATUS_SEEK_BIT 0x10 |
| #define | STATUS_DF_BIT 0x20 |
| #define | DRIVE_LBA_BIT 0x40 |
| #define | DEV0 (0) |
| #define | DEV1 (1) |
Typedefs | |
| typedef struct PrdEntry | PrdEntry_t |
| typedef struct CommandReg | CommandReg_t |
| typedef enum Events | Events_t |
| typedef enum DevAction | DevAction_t |
| typedef enum DevState | DevState_t |
| typedef enum DmaState | DmaState_t |
Enumerations | |
| enum | Events { None = 0, Transfer, ReadWait, WriteWait, PrdRead, DmaRead, DmaWrite } |
| enum | DevAction { ACT_NONE = 0, ACT_CMD_WRITE, ACT_CMD_COMPLETE, ACT_CMD_ERROR, ACT_SELECT_WRITE, ACT_STAT_READ, ACT_DATA_READY, ACT_DATA_READ_BYTE, ACT_DATA_READ_SHORT, ACT_DATA_WRITE_BYTE, ACT_DATA_WRITE_SHORT, ACT_DMA_READY, ACT_DMA_DONE, ACT_SRST_SET, ACT_SRST_CLEAR } |
| enum | DevState { Device_Idle_S = 0, Device_Idle_SI, Device_Idle_NS, Device_Srst, Command_Execution, Prepare_Data_In, Data_Ready_INTRQ_In, Transfer_Data_In, Prepare_Data_Out, Data_Ready_INTRQ_Out, Transfer_Data_Out, Prepare_Data_Dma, Transfer_Data_Dma, Device_Dma_Abort } |
| enum | DmaState { Dma_Idle = 0, Dma_Start, Dma_Transfer } |
Device model for an IDE disk
Definition in file ide_disk.hh.
| #define ALTSTAT_OFFSET (2) |
Definition at line 109 of file ide_disk.hh.
| #define COMMAND_OFFSET (7) |
Definition at line 106 of file ide_disk.hh.
| #define CONTROL_IEN_BIT 0x02 |
Definition at line 113 of file ide_disk.hh.
| #define CONTROL_OFFSET (2) |
Definition at line 108 of file ide_disk.hh.
| #define CONTROL_RST_BIT 0x04 |
Definition at line 112 of file ide_disk.hh.
| #define DATA_OFFSET (0) |
Definition at line 96 of file ide_disk.hh.
| #define DEV0 (0) |
Definition at line 121 of file ide_disk.hh.
| #define DEV1 (1) |
Definition at line 122 of file ide_disk.hh.
| #define DMA_BACKOFF_PERIOD 200 |
Definition at line 59 of file ide_disk.hh.
| #define DRIVE_LBA_BIT 0x40 |
Definition at line 119 of file ide_disk.hh.
| #define DRIVE_OFFSET (6) |
Definition at line 104 of file ide_disk.hh.
| #define ERROR_OFFSET (1) |
Definition at line 97 of file ide_disk.hh.
| #define FEATURES_OFFSET (1) |
Definition at line 98 of file ide_disk.hh.
| #define HCYL_OFFSET (5) |
Definition at line 102 of file ide_disk.hh.
| #define LCYL_OFFSET (4) |
Definition at line 101 of file ide_disk.hh.
| #define MAX_DMA_SIZE 0x20000 |
Definition at line 61 of file ide_disk.hh.
| #define MAX_MULTSECT (128) |
Definition at line 63 of file ide_disk.hh.
| #define MAX_SINGLE_DMA_SIZE 0x10000 |
Definition at line 62 of file ide_disk.hh.
| #define NSECTOR_OFFSET (2) |
Definition at line 99 of file ide_disk.hh.
| #define PRD_BASE_MASK 0xfffffffe |
Definition at line 65 of file ide_disk.hh.
| #define PRD_COUNT_MASK 0xfffe |
Definition at line 66 of file ide_disk.hh.
| #define PRD_EOT_MASK 0x8000 |
Definition at line 67 of file ide_disk.hh.
| #define SECTOR_OFFSET (3) |
Definition at line 100 of file ide_disk.hh.
| #define SELECT_DEV_BIT 0x10 |
Definition at line 111 of file ide_disk.hh.
| #define SELECT_OFFSET (6) |
Definition at line 103 of file ide_disk.hh.
| #define STATUS_BSY_BIT 0x80 |
Definition at line 114 of file ide_disk.hh.
| #define STATUS_DF_BIT 0x20 |
Definition at line 118 of file ide_disk.hh.
| #define STATUS_DRDY_BIT 0x40 |
Definition at line 115 of file ide_disk.hh.
| #define STATUS_DRQ_BIT 0x08 |
Definition at line 116 of file ide_disk.hh.
| #define STATUS_OFFSET (7) |
Definition at line 105 of file ide_disk.hh.
| #define STATUS_SEEK_BIT 0x10 |
Definition at line 117 of file ide_disk.hh.
| typedef struct CommandReg CommandReg_t |
| typedef enum DevAction DevAction_t |
| typedef enum DevState DevState_t |
| typedef enum DmaState DmaState_t |
| typedef struct PrdEntry PrdEntry_t |
| enum DevAction |
Definition at line 148 of file ide_disk.hh.
| enum DevState |
Definition at line 166 of file ide_disk.hh.
| enum DmaState |
| Enumerator | |
|---|---|
| Dma_Idle | |
| Dma_Start | |
| Dma_Transfer | |
Definition at line 194 of file ide_disk.hh.
| enum Events |
| Enumerator | |
|---|---|
| None | |
| Transfer | |
| ReadWait | |
| WriteWait | |
| PrdRead | |
| DmaRead | |
| DmaWrite | |
Definition at line 138 of file ide_disk.hh.