ConfigCache::Entry Struct Reference

#include <smmu_v3_caches.hh>

Public Attributes
bool	valid
uint32_t	lastUsed
uint32_t	sid
uint32_t	ssid
bool	stage1_en
bool	stage2_en
Addr	ttb0
Addr	ttb1
Addr	httb
uint16_t	asid
uint16_t	vmid
uint8_t	stage1_tg
uint8_t	stage2_tg
uint8_t	t0sz
uint8_t	s2t0sz

Detailed Description

Definition at line 242 of file smmu_v3_caches.hh.

Member Data Documentation

asid

uint16_t ConfigCache::Entry::asid

Definition at line 257 of file smmu_v3_caches.hh.

httb

Addr ConfigCache::Entry::httb

Definition at line 256 of file smmu_v3_caches.hh.

lastUsed

uint32_t ConfigCache::Entry::lastUsed

mutable

Definition at line 245 of file smmu_v3_caches.hh.

Referenced by ConfigCache::lookup(), and ConfigCache::store().

s2t0sz

uint8_t ConfigCache::Entry::s2t0sz

Definition at line 262 of file smmu_v3_caches.hh.

sid

uint32_t ConfigCache::Entry::sid

Definition at line 248 of file smmu_v3_caches.hh.

Referenced by ConfigCache::store().

ssid

uint32_t ConfigCache::Entry::ssid

Definition at line 249 of file smmu_v3_caches.hh.

Referenced by ConfigCache::store().

stage1_en

bool ConfigCache::Entry::stage1_en

Definition at line 252 of file smmu_v3_caches.hh.

stage1_tg

uint8_t ConfigCache::Entry::stage1_tg

Definition at line 259 of file smmu_v3_caches.hh.

stage2_en

bool ConfigCache::Entry::stage2_en

Definition at line 253 of file smmu_v3_caches.hh.

stage2_tg

uint8_t ConfigCache::Entry::stage2_tg

Definition at line 260 of file smmu_v3_caches.hh.

t0sz

uint8_t ConfigCache::Entry::t0sz

Definition at line 261 of file smmu_v3_caches.hh.

ttb0

Addr ConfigCache::Entry::ttb0

Definition at line 254 of file smmu_v3_caches.hh.

ttb1

Addr ConfigCache::Entry::ttb1

Definition at line 255 of file smmu_v3_caches.hh.

valid

bool ConfigCache::Entry::valid

Definition at line 244 of file smmu_v3_caches.hh.

Referenced by ConfigCache::store().

vmid

uint16_t ConfigCache::Entry::vmid

Definition at line 258 of file smmu_v3_caches.hh.

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The documentation for this struct was generated from the following file:

• dev/arm/smmu_v3_caches.hh