static_inst.hh

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/*
 * Copyright (c) 2009 The University of Edinburgh
 * All rights reserved.
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 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
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 * redistributions in binary form must reproduce the above copyright
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 * this software without specific prior written permission.
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#ifndef __ARCH_POWER_INSTS_STATICINST_HH__
#define __ARCH_POWER_INSTS_STATICINST_HH__
 
#include "arch/power/types.hh"
#include "base/trace.hh"
#include "cpu/static_inst.hh"
 
namespace gem5
{
 
namespace PowerISA
{
 
class PowerStaticInst : public StaticInst
{
  protected:
    ExtMachInst machInst;
 
    // Constructor
    PowerStaticInst(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
        : StaticInst(mnem, __opClass), machInst(_machInst)
    {
    }
 
    // Insert a condition value into a CR (condition register) field
    inline uint32_t
    insertCRField(uint32_t cr, uint32_t bf, uint32_t value) const
    {
        uint32_t bits = value << ((7 - bf) * 4);
        uint32_t mask = ~(0xf << ((7 - bf) * 4));
        return (cr & mask) | bits;
    }
 
    void
    printReg(std::ostream &os, RegId reg) const;
 
    std::string generateDisassembly(
            Addr pc, const loader::SymbolTable *symtab) const override;
 
    void
    advancePC(PowerISA::PCState &pcState) const override
    {
        pcState.advance();
    }
 
    PCState
    buildRetPC(const PCState &curPC, const PCState &callPC) const override
    {
        PCState retPC = callPC;
        retPC.advance();
        return retPC;
    }
 
    size_t
    asBytes(void *buf, size_t max_size) override
    {
        return simpleAsBytes(buf, max_size, machInst);
    }
};
 
} // namespace PowerISA
} // namespace gem5
 
#endif //__ARCH_POWER_INSTS_STATICINST_HH__