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gem5
v21.1.0.2
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#include "arch/x86/types.hh"#include "base/trace.hh"#include "cpu/static_inst.hh"#include "debug/X86.hh"Go to the source code of this file.
Classes | |
| struct | gem5::X86ISA::GpRegIndex |
| Classes for register indices passed to instruction constructors. More... | |
| struct | gem5::X86ISA::FpRegIndex |
| struct | gem5::X86ISA::CtrlRegIndex |
| struct | gem5::X86ISA::CrRegIndex |
| struct | gem5::X86ISA::DbgRegIndex |
| struct | gem5::X86ISA::SegRegIndex |
| class | gem5::X86ISA::X86StaticInst |
| Base class for all X86 static instructions. More... | |
Namespaces | |
| gem5 | |
| Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223. | |
| gem5::X86ISA | |
| This is exposed globally, independent of the ISA. | |