gem5::SparcISA::ISA Class Reference

#include <isa.hh>

Inheritance diagram for gem5::SparcISA::ISA:

Public Types
using	Params = SparcISAParams
Public Types inherited from gem5::BaseISA
typedef std::vector< RegClassInfo >	RegClasses
Public Types inherited from gem5::SimObject
typedef SimObjectParams	Params

Public Member Functions
void	clear ()
void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...
void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...
RegVal	readMiscRegNoEffect (int miscReg) const
RegVal	readMiscReg (int miscReg)
void	setMiscRegNoEffect (int miscReg, RegVal val)
void	setMiscReg (int miscReg, RegVal val)
RegId	flattenRegId (const RegId &regId) const
int	flattenIntIndex (int reg) const
int	flattenFloatIndex (int reg) const
int	flattenVecIndex (int reg) const
int	flattenVecElemIndex (int reg) const
int	flattenVecPredIndex (int reg) const
int	flattenCCIndex (int reg) const
int	flattenMiscIndex (int reg) const
uint64_t	getExecutingAsid () const override
bool	inUserMode () const override
void	copyRegsFrom (ThreadContext *src) override
	ISA (const Params &p)
Public Member Functions inherited from gem5::BaseISA
virtual void	takeOverFrom (ThreadContext *new_tc, ThreadContext *old_tc)
virtual void	setThreadContext (ThreadContext *_tc)
virtual enums::VecRegRenameMode	initVecRegRenameMode () const
virtual enums::VecRegRenameMode	vecRegRenameMode (ThreadContext *_tc) const
const RegClasses &	regClasses () const
Public Member Functions inherited from gem5::SimObject
const Params &	params () const
	SimObject (const Params &p)
virtual	~SimObject ()
virtual void	init ()
	init() is called after all C++ SimObjects have been created and all ports are connected. More...
virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint. More...
virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint. More...
virtual void	regProbePoints ()
	Register probe points for this object. More...
virtual void	regProbeListeners ()
	Register probe listeners for this object. More...
ProbeManager *	getProbeManager ()
	Get the probe manager for this object. More...
virtual Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID)
	Get a port with a given name and index. More...
virtual void	startup ()
	startup() is the final initialization call before simulation. More...
DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining. More...
virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes. More...
virtual void	memInvalidate ()
	Invalidate the contents of memory buffers. More...
void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...
void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...
Public Member Functions inherited from gem5::EventManager
EventQueue *	eventQueue () const
void	schedule (Event &event, Tick when)
void	deschedule (Event &event)
void	reschedule (Event &event, Tick when, bool always=false)
void	schedule (Event *event, Tick when)
void	deschedule (Event *event)
void	reschedule (Event *event, Tick when, bool always=false)
void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...
void	setCurTick (Tick newVal)
	EventManager (EventManager &em)
	Event manger manages events in the event queue. More...
	EventManager (EventManager *em)
	EventManager (EventQueue *eq)
Public Member Functions inherited from gem5::Serializable
	Serializable ()
virtual	~Serializable ()
void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section. More...
void	serializeSection (CheckpointOut &cp, const std::string &name) const
void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object. More...
void	unserializeSection (CheckpointIn &cp, const std::string &name)
Public Member Functions inherited from gem5::Drainable
DrainState	drainState () const
	Return the current drain state of an object. More...
virtual void	notifyFork ()
	Notify a child process of a fork. More...
Public Member Functions inherited from gem5::statistics::Group
	Group (Group *parent, const char *name=nullptr)
	Construct a new statistics group. More...
virtual	~Group ()
virtual void	regStats ()
	Callback to set stat parameters. More...
virtual void	resetStats ()
	Callback to reset stats. More...
virtual void	preDumpStats ()
	Callback before stats are dumped. More...
void	addStat (statistics::Info *info)
	Register a stat with this group. More...
const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object. More...
const std::vector< Info * > &	getStats () const
	Get all stats associated with this object. More...
void	addStatGroup (const char *name, Group *block)
	Add a stat block as a child of this block. More...
const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group. More...
void	mergeStatGroup (Group *block)
	Merge the contents (stats & children) of a block to this block. More...
	Group ()=delete
	Group (const Group &)=delete
Group &	operator= (const Group &)=delete
Public Member Functions inherited from gem5::Named
	Named (const std::string &name_)
virtual	~Named ()=default
virtual std::string	name () const

Protected Member Functions
bool	isHyperPriv ()
bool	isPriv ()
bool	isNonPriv ()
Protected Member Functions inherited from gem5::BaseISA
	SimObject (const Params &p)
Protected Member Functions inherited from gem5::Drainable
	Drainable ()
virtual	~Drainable ()
virtual void	drainResume ()
	Resume execution after a successful drain. More...
void	signalDrainDone () const
	Signal that an object is drained. More...

Private Types
enum	InstIntRegOffsets {   CurrentGlobalsOffset = 0, CurrentWindowOffset = CurrentGlobalsOffset + NumGlobalRegs, MicroIntOffset = CurrentWindowOffset + NumWindowedRegs, NextGlobalsOffset = MicroIntOffset + NumMicroIntRegs,   NextWindowOffset = NextGlobalsOffset + NumGlobalRegs, PreviousGlobalsOffset = NextWindowOffset + NumWindowedRegs, PreviousWindowOffset = PreviousGlobalsOffset + NumGlobalRegs, TotalInstIntRegs = PreviousWindowOffset + NumWindowedRegs }
typedef EventWrapper< ISA, &ISA::processTickCompare >	TickCompareEvent
typedef EventWrapper< ISA, &ISA::processSTickCompare >	STickCompareEvent
typedef EventWrapper< ISA, &ISA::processHSTickCompare >	HSTickCompareEvent

Private Member Functions
void	setFSReg (int miscReg, RegVal val)
RegVal	readFSReg (int miscReg)
void	checkSoftInt ()
void	processTickCompare ()
	Process a tick compare event and generate an interrupt on the cpu if appropriate. More...
void	processSTickCompare ()
void	processHSTickCompare ()
void	installWindow (int cwp, int offset)
void	installGlobals (int gl, int offset)
void	reloadRegMap ()

Private Attributes
uint8_t	asi
uint64_t	tick
uint8_t	fprs
uint64_t	gsr
uint64_t	softint
uint64_t	tick_cmpr
uint64_t	stick
uint64_t	stick_cmpr
uint64_t	tpc [MaxTL]
uint64_t	tnpc [MaxTL]
uint64_t	tstate [MaxTL]
uint16_t	tt [MaxTL]
uint64_t	tba
PSTATE	pstate
uint8_t	tl
uint8_t	pil
uint8_t	cwp
uint8_t	gl
HPSTATE	hpstate
	Hyperprivileged Registers. More...
uint64_t	htstate [MaxTL]
uint64_t	hintp
uint64_t	htba
uint64_t	hstick_cmpr
uint64_t	strandStatusReg
uint64_t	fsr
	Floating point misc registers. More...
uint16_t	priContext
	MMU Internal Registers. More...
uint16_t	secContext
uint16_t	partId
uint64_t	lsuCtrlReg
uint64_t	scratchPad [8]
uint64_t	cpu_mondo_head
uint64_t	cpu_mondo_tail
uint64_t	dev_mondo_head
uint64_t	dev_mondo_tail
uint64_t	res_error_head
uint64_t	res_error_tail
uint64_t	nres_error_head
uint64_t	nres_error_tail
TickCompareEvent *	tickCompare = nullptr
STickCompareEvent *	sTickCompare = nullptr
HSTickCompareEvent *	hSTickCompare = nullptr
RegIndex	intRegMap [TotalInstIntRegs]

Static Private Attributes
static const int	NumGlobalRegs = 8
static const int	NumWindowedRegs = 24
static const int	WindowOverlap = 8
static const int	TotalGlobals = (MaxGL + 1) * NumGlobalRegs
static const int	RegsPerWindow = NumWindowedRegs - WindowOverlap
static const int	TotalWindowed = NWindows * RegsPerWindow

Additional Inherited Members
Static Public Member Functions inherited from gem5::SimObject
static void	serializeAll (const std::string &cpt_dir)
	Create a checkpoint by serializing all SimObjects in the system. More...
static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it. More...
static void	setSimObjectResolver (SimObjectResolver *resolver)
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
static SimObjectResolver *	getSimObjectResolver ()
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section. More...
static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it. More...
Protected Attributes inherited from gem5::BaseISA
ThreadContext *	tc = nullptr
RegClasses	_regClasses
Protected Attributes inherited from gem5::SimObject
const SimObjectParams &	_params
	Cached copy of the object parameters. More...
Protected Attributes inherited from gem5::EventManager
EventQueue *	eventq
	A pointer to this object's event queue. More...

Detailed Description

Definition at line 53 of file isa.hh.

Member Typedef Documentation

HSTickCompareEvent

typedef EventWrapper<ISA, &ISA::processHSTickCompare> gem5::SparcISA::ISA::HSTickCompareEvent

private

Definition at line 140 of file isa.hh.

Params

using gem5::SparcISA::ISA::Params = SparcISAParams

Definition at line 230 of file isa.hh.

STickCompareEvent

typedef EventWrapper<ISA, &ISA::processSTickCompare> gem5::SparcISA::ISA::STickCompareEvent

private

Definition at line 137 of file isa.hh.

TickCompareEvent

typedef EventWrapper<ISA, &ISA::processTickCompare> gem5::SparcISA::ISA::TickCompareEvent

private

Definition at line 134 of file isa.hh.

Member Enumeration Documentation

InstIntRegOffsets

enum gem5::SparcISA::ISA::InstIntRegOffsets

private

Enumerator
CurrentGlobalsOffset
CurrentWindowOffset
MicroIntOffset
NextGlobalsOffset
NextWindowOffset
PreviousGlobalsOffset
PreviousWindowOffset
TotalInstIntRegs

Definition at line 151 of file isa.hh.

Constructor & Destructor Documentation

ISA()

gem5::SparcISA::ISA::ISA

(

const Params &

p

)

Definition at line 69 of file isa.cc.

References gem5::BaseISA::_regClasses, clear(), gem5::SparcISA::NumFloatRegs, gem5::SparcISA::NumIntRegs, and gem5::SparcISA::NumMiscRegs.

Member Function Documentation

checkSoftInt()

void gem5::ISA::checkSoftInt ( )

private

Definition at line 47 of file ua2005.cc.

References gem5::BaseCPU::clearInterrupt(), gem5::ThreadContext::getCpuPtr(), gem5::SparcISA::IT_SOFT_INT, pil, gem5::BaseCPU::postInterrupt(), softint, and gem5::BaseISA::tc.

Referenced by setFSReg().

clear()

void gem5::SparcISA::ISA::clear

(

)

Definition at line 293 of file isa.cc.

References asi, cpu_mondo_head, cpu_mondo_tail, cwp, dev_mondo_head, dev_mondo_tail, fprs, fsr, gl, gsr, hintp, hpstate, hstick_cmpr, hSTickCompare, htba, htstate, lsuCtrlReg, nres_error_head, nres_error_tail, panic, partId, pil, priContext, pstate, reloadRegMap(), res_error_head, res_error_tail, scratchPad, secContext, softint, stick, stick_cmpr, sTickCompare, strandStatusReg, tba, tick, tick_cmpr, tickCompare, tl, tnpc, tpc, tstate, and tt.

Referenced by ISA().

copyRegsFrom()

void gem5::SparcISA::ISA::copyRegsFrom ( ThreadContext *  src )

overridevirtual

Implements gem5::BaseISA.

Definition at line 217 of file isa.cc.

References gem5::SparcISA::copyMiscRegs(), gem5::ArmISA::i, gem5::SparcISA::MaxGL, gem5::SparcISA::MISCREG_CWP, gem5::SparcISA::MISCREG_GL, gem5::SparcISA::NumFloatArchRegs, gem5::SparcISA::NumIntArchRegs, gem5::SparcISA::NumMicroIntRegs, gem5::SparcISA::NWindows, gem5::ThreadContext::pcState(), gem5::ThreadContext::readFloatReg(), gem5::ThreadContext::readIntReg(), gem5::ThreadContext::readMiscRegNoEffect(), gem5::ThreadContext::setFloatReg(), gem5::ThreadContext::setIntReg(), gem5::ThreadContext::setMiscReg(), gem5::BaseISA::tc, and gem5::RiscvISA::x.

flattenCCIndex()

int gem5::SparcISA::ISA::flattenCCIndex ( int  reg ) const

inline

Definition at line 221 of file isa.hh.

References gem5::X86ISA::reg.

Referenced by flattenRegId().

flattenFloatIndex()

int gem5::SparcISA::ISA::flattenFloatIndex ( int  reg ) const

inline

Definition at line 215 of file isa.hh.

References gem5::X86ISA::reg.

Referenced by flattenRegId().

flattenIntIndex()

int gem5::SparcISA::ISA::flattenIntIndex ( int  reg ) const

inline

Definition at line 207 of file isa.hh.

References intRegMap, gem5::SparcISA::NumIntRegs, gem5::X86ISA::reg, and TotalInstIntRegs.

Referenced by flattenRegId().

flattenMiscIndex()

int gem5::SparcISA::ISA::flattenMiscIndex ( int  reg ) const

inline

Definition at line 222 of file isa.hh.

References gem5::X86ISA::reg.

Referenced by flattenRegId().

flattenRegId()

RegId gem5::SparcISA::ISA::flattenRegId ( const RegId &  regId ) const

inline

Definition at line 189 of file isa.hh.

References gem5::CCRegClass, gem5::RegId::classValue(), flattenCCIndex(), flattenFloatIndex(), flattenIntIndex(), flattenMiscIndex(), gem5::FloatRegClass, gem5::RegId::index(), gem5::IntRegClass, and gem5::MiscRegClass.

flattenVecElemIndex()

int gem5::SparcISA::ISA::flattenVecElemIndex ( int  reg ) const

inline

Definition at line 217 of file isa.hh.

References gem5::X86ISA::reg.

flattenVecIndex()

int gem5::SparcISA::ISA::flattenVecIndex ( int  reg ) const

inline

Definition at line 216 of file isa.hh.

References gem5::X86ISA::reg.

flattenVecPredIndex()

int gem5::SparcISA::ISA::flattenVecPredIndex ( int  reg ) const

inline

Definition at line 218 of file isa.hh.

References gem5::X86ISA::reg.

getExecutingAsid()

uint64_t gem5::SparcISA::ISA::getExecutingAsid ( ) const

inlineoverridevirtual

Reimplemented from gem5::BaseISA.

Definition at line 225 of file isa.hh.

References gem5::SparcISA::MISCREG_MMU_P_CONTEXT, and readMiscRegNoEffect().

installGlobals()

void gem5::SparcISA::ISA::installGlobals ( int  gl, int  offset  )

private

Definition at line 283 of file isa.cc.

References gl, gem5::ArmISA::i, intRegMap, NumGlobalRegs, gem5::SparcISA::NumIntRegs, and gem5::ArmISA::offset.

Referenced by reloadRegMap(), and setMiscReg().

installWindow()

void gem5::SparcISA::ISA::installWindow ( int  cwp, int  offset  )

private

Definition at line 273 of file isa.cc.

References cwp, gem5::ArmISA::i, intRegMap, gem5::SparcISA::NumIntRegs, NumWindowedRegs, gem5::ArmISA::offset, RegsPerWindow, TotalGlobals, and TotalWindowed.

Referenced by reloadRegMap(), and setMiscReg().

inUserMode()

bool gem5::SparcISA::ISA::inUserMode ( ) const

inlineoverridevirtual

Implements gem5::BaseISA.

Definition at line 233 of file isa.hh.

References hpstate, gem5::SparcISA::MISCREG_HPSTATE, gem5::SparcISA::MISCREG_PSTATE, pstate, and readMiscRegNoEffect().

isHyperPriv()

bool gem5::SparcISA::ISA::isHyperPriv ( )

inlineprotected

Definition at line 176 of file isa.hh.

References hpstate.

isNonPriv()

bool gem5::SparcISA::ISA::isNonPriv ( )

inlineprotected

Definition at line 178 of file isa.hh.

References isPriv().

isPriv()

bool gem5::SparcISA::ISA::isPriv ( )

inlineprotected

Definition at line 177 of file isa.hh.

References hpstate, and pstate.

Referenced by isNonPriv().

processHSTickCompare()

void gem5::ISA::processHSTickCompare ( )

private

Definition at line 352 of file ua2005.cc.

References gem5::Clocked::clockEdge(), DPRINTF, gem5::ThreadContext::getCpuPtr(), gem5::ThreadContext::Halted, hstick_cmpr, hSTickCompare, gem5::BaseCPU::instCount(), gem5::mask(), gem5::SparcISA::MISCREG_HINTP, gem5::SparcISA::MISCREG_HSTICK_CMPR, gem5::ThreadContext::readMiscRegNoEffect(), gem5::EventManager::schedule(), setMiscReg(), gem5::ThreadContext::status(), stick, stick_cmpr, gem5::ThreadContext::Suspended, and gem5::BaseISA::tc.

processSTickCompare()

void gem5::ISA::processSTickCompare ( )

private

Definition at line 328 of file ua2005.cc.

References gem5::Clocked::clockEdge(), DPRINTF, gem5::ThreadContext::getCpuPtr(), gem5::BaseCPU::instCount(), gem5::mask(), gem5::SparcISA::MISCREG_SOFTINT, gem5::SparcISA::MISCREG_STICK_CMPR, gem5::ThreadContext::readMiscRegNoEffect(), gem5::EventManager::schedule(), setMiscReg(), softint, gem5::ThreadContext::status(), stick, stick_cmpr, sTickCompare, gem5::ThreadContext::Suspended, and gem5::BaseISA::tc.

processTickCompare()

void gem5::ISA::processTickCompare ( )

private

Process a tick compare event and generate an interrupt on the cpu if appropriate.

Definition at line 322 of file ua2005.cc.

References panic.

readFSReg()

RegVal gem5::ISA::readFSReg ( int  miscReg )

private

Definition at line 248 of file ua2005.cc.

References gem5::ThreadContext::Active, gem5::ThreadContext::contextId(), gem5::ThreadContext::getSystemPtr(), gem5::ThreadContext::Halted, gem5::SparcISA::MaxTL, gem5::SparcISA::MISCREG_HINTP, gem5::SparcISA::MISCREG_HPSTATE, gem5::SparcISA::MISCREG_HSTICK_CMPR, gem5::SparcISA::MISCREG_HTBA, gem5::SparcISA::MISCREG_HTSTATE, gem5::SparcISA::MISCREG_HVER, gem5::SparcISA::MISCREG_PIL, gem5::SparcISA::MISCREG_QUEUE_CPU_MONDO_HEAD, gem5::SparcISA::MISCREG_QUEUE_CPU_MONDO_TAIL, gem5::SparcISA::MISCREG_QUEUE_DEV_MONDO_HEAD, gem5::SparcISA::MISCREG_QUEUE_DEV_MONDO_TAIL, gem5::SparcISA::MISCREG_QUEUE_NRES_ERROR_HEAD, gem5::SparcISA::MISCREG_QUEUE_NRES_ERROR_TAIL, gem5::SparcISA::MISCREG_QUEUE_RES_ERROR_HEAD, gem5::SparcISA::MISCREG_QUEUE_RES_ERROR_TAIL, gem5::SparcISA::MISCREG_SOFTINT, gem5::SparcISA::MISCREG_STICK_CMPR, gem5::SparcISA::MISCREG_STRAND_STS_REG, gem5::SparcISA::MISCREG_TICK_CMPR, gem5::SparcISA::NWindows, panic, readMiscRegNoEffect(), gem5::System::Threads::size(), gem5::ThreadContext::Suspended, gem5::BaseISA::tc, gem5::System::threads, and gem5::RiscvISA::x.

Referenced by readMiscReg().

readMiscReg()

RegVal gem5::SparcISA::ISA::readMiscReg

(

int

miscReg

)

Definition at line 517 of file isa.cc.

References DPRINTF, fprs, gem5::ThreadContext::getCpuPtr(), gem5::BaseCPU::instCount(), gem5::mbits(), gem5::SparcISA::MISCREG_FPRS, gem5::SparcISA::MISCREG_HINTP, gem5::SparcISA::MISCREG_HPSTATE, gem5::SparcISA::MISCREG_HSTICK_CMPR, gem5::SparcISA::MISCREG_HTBA, gem5::SparcISA::MISCREG_HTSTATE, gem5::SparcISA::MISCREG_HVER, gem5::SparcISA::MISCREG_PCR, gem5::SparcISA::MISCREG_PIC, gem5::SparcISA::MISCREG_PRIVTICK, gem5::SparcISA::MISCREG_QUEUE_CPU_MONDO_HEAD, gem5::SparcISA::MISCREG_QUEUE_CPU_MONDO_TAIL, gem5::SparcISA::MISCREG_QUEUE_DEV_MONDO_HEAD, gem5::SparcISA::MISCREG_QUEUE_DEV_MONDO_TAIL, gem5::SparcISA::MISCREG_QUEUE_NRES_ERROR_HEAD, gem5::SparcISA::MISCREG_QUEUE_NRES_ERROR_TAIL, gem5::SparcISA::MISCREG_QUEUE_RES_ERROR_HEAD, gem5::SparcISA::MISCREG_QUEUE_RES_ERROR_TAIL, gem5::SparcISA::MISCREG_SOFTINT, gem5::SparcISA::MISCREG_SOFTINT_CLR, gem5::SparcISA::MISCREG_SOFTINT_SET, gem5::SparcISA::MISCREG_STICK, gem5::SparcISA::MISCREG_STICK_CMPR, gem5::SparcISA::MISCREG_STRAND_STS_REG, gem5::SparcISA::MISCREG_TICK, gem5::SparcISA::MISCREG_TICK_CMPR, panic, readFSReg(), readMiscRegNoEffect(), stick, gem5::BaseISA::tc, and tick.

readMiscRegNoEffect()

RegVal gem5::SparcISA::ISA::readMiscRegNoEffect

(

int

miscReg

)

const

Privilged Registers

Hyper privileged registers

Floating Point Status Register

Definition at line 356 of file isa.cc.

References asi, gem5::bits(), cpu_mondo_head, cpu_mondo_tail, cwp, dev_mondo_head, dev_mondo_tail, DPRINTF, fprs, fsr, gl, gsr, hintp, hpstate, hstick_cmpr, htba, htstate, lsuCtrlReg, gem5::SparcISA::MISCREG_ASI, gem5::SparcISA::MISCREG_CWP, gem5::SparcISA::MISCREG_FPRS, gem5::SparcISA::MISCREG_FSR, gem5::SparcISA::MISCREG_GL, gem5::SparcISA::MISCREG_GSR, gem5::SparcISA::MISCREG_HINTP, gem5::SparcISA::MISCREG_HPSTATE, gem5::SparcISA::MISCREG_HSTICK_CMPR, gem5::SparcISA::MISCREG_HTBA, gem5::SparcISA::MISCREG_HTSTATE, gem5::SparcISA::MISCREG_MMU_LSU_CTRL, gem5::SparcISA::MISCREG_MMU_P_CONTEXT, gem5::SparcISA::MISCREG_MMU_PART_ID, gem5::SparcISA::MISCREG_MMU_S_CONTEXT, gem5::SparcISA::MISCREG_PCR, gem5::SparcISA::MISCREG_PIC, gem5::SparcISA::MISCREG_PIL, gem5::SparcISA::MISCREG_PRIVTICK, gem5::SparcISA::MISCREG_PSTATE, gem5::SparcISA::MISCREG_QUEUE_CPU_MONDO_HEAD, gem5::SparcISA::MISCREG_QUEUE_CPU_MONDO_TAIL, gem5::SparcISA::MISCREG_QUEUE_DEV_MONDO_HEAD, gem5::SparcISA::MISCREG_QUEUE_DEV_MONDO_TAIL, gem5::SparcISA::MISCREG_QUEUE_NRES_ERROR_HEAD, gem5::SparcISA::MISCREG_QUEUE_NRES_ERROR_TAIL, gem5::SparcISA::MISCREG_QUEUE_RES_ERROR_HEAD, gem5::SparcISA::MISCREG_QUEUE_RES_ERROR_TAIL, gem5::SparcISA::MISCREG_SCRATCHPAD_R0, gem5::SparcISA::MISCREG_SCRATCHPAD_R1, gem5::SparcISA::MISCREG_SCRATCHPAD_R2, gem5::SparcISA::MISCREG_SCRATCHPAD_R3, gem5::SparcISA::MISCREG_SCRATCHPAD_R4, gem5::SparcISA::MISCREG_SCRATCHPAD_R5, gem5::SparcISA::MISCREG_SCRATCHPAD_R6, gem5::SparcISA::MISCREG_SCRATCHPAD_R7, gem5::SparcISA::MISCREG_SOFTINT, gem5::SparcISA::MISCREG_STICK, gem5::SparcISA::MISCREG_STICK_CMPR, gem5::SparcISA::MISCREG_STRAND_STS_REG, gem5::SparcISA::MISCREG_TBA, gem5::SparcISA::MISCREG_TICK, gem5::SparcISA::MISCREG_TICK_CMPR, gem5::SparcISA::MISCREG_TL, gem5::SparcISA::MISCREG_TLB_DATA, gem5::SparcISA::MISCREG_TNPC, gem5::SparcISA::MISCREG_TPC, gem5::SparcISA::MISCREG_TSTATE, gem5::SparcISA::MISCREG_TT, nres_error_head, nres_error_tail, panic, partId, pil, priContext, pstate, res_error_head, res_error_tail, scratchPad, secContext, softint, stick, stick_cmpr, strandStatusReg, tba, tick, tick_cmpr, tl, tnpc, tpc, tstate, and tt.

Referenced by getExecutingAsid(), inUserMode(), readFSReg(), and readMiscReg().

reloadRegMap()

void gem5::SparcISA::ISA::reloadRegMap ( )

private

Definition at line 259 of file isa.cc.

References CurrentGlobalsOffset, CurrentWindowOffset, cwp, gl, gem5::ArmISA::i, installGlobals(), installWindow(), intRegMap, MicroIntOffset, NextGlobalsOffset, NextWindowOffset, gem5::SparcISA::NumMicroIntRegs, gem5::SparcISA::NWindows, PreviousGlobalsOffset, PreviousWindowOffset, and TotalGlobals.

Referenced by clear(), and unserialize().

serialize()

void gem5::SparcISA::ISA::serialize ( CheckpointOut &  cp ) const

overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters

cp	Checkpoint state

Implements gem5::Serializable.

Definition at line 822 of file isa.cc.

References asi, cpu_mondo_head, cpu_mondo_tail, cwp, dev_mondo_head, dev_mondo_tail, fprs, fsr, gl, gsr, hintp, hpstate, hstick_cmpr, hSTickCompare, htba, htstate, lsuCtrlReg, gem5::SparcISA::MaxTL, nres_error_head, nres_error_tail, partId, pil, priContext, pstate, res_error_head, res_error_tail, gem5::Event::scheduled(), scratchPad, secContext, SERIALIZE_ARRAY, SERIALIZE_SCALAR, softint, stick, stick_cmpr, sTickCompare, strandStatusReg, tba, tick, tick_cmpr, tickCompare, tl, tnpc, tpc, tstate, tt, and gem5::Event::when().

setFSReg()

void gem5::ISA::setFSReg ( int  miscReg, RegVal  val  )

private

Definition at line 92 of file ua2005.cc.

References gem5::bits(), checkSoftInt(), gem5::BaseCPU::clearInterrupt(), gem5::Clocked::clockEdge(), cpu_mondo_head, cpu_mondo_tail, gem5::EventManager::deschedule(), dev_mondo_head, dev_mondo_tail, DPRINTF, gem5::ThreadContext::getCpuPtr(), gem5::getMiscRegName(), gem5::ThreadContext::getSystemPtr(), hintp, hpstate, hstick_cmpr, hSTickCompare, gem5::BaseCPU::instCount(), gem5::SparcISA::IT_CPU_MONDO, gem5::SparcISA::IT_DEV_MONDO, gem5::SparcISA::IT_HINTP, gem5::SparcISA::IT_RES_ERROR, gem5::SparcISA::IT_TRAP_LEVEL_ZERO, gem5::mask(), gem5::SparcISA::MISCREG_HINTP, gem5::SparcISA::MISCREG_HPSTATE, gem5::SparcISA::MISCREG_HSTICK_CMPR, gem5::SparcISA::MISCREG_HTBA, gem5::SparcISA::MISCREG_HTSTATE, gem5::SparcISA::MISCREG_HVER, gem5::SparcISA::MISCREG_PIL, gem5::SparcISA::MISCREG_PSTATE, gem5::SparcISA::MISCREG_QUEUE_CPU_MONDO_HEAD, gem5::SparcISA::MISCREG_QUEUE_CPU_MONDO_TAIL, gem5::SparcISA::MISCREG_QUEUE_DEV_MONDO_HEAD, gem5::SparcISA::MISCREG_QUEUE_DEV_MONDO_TAIL, gem5::SparcISA::MISCREG_QUEUE_NRES_ERROR_HEAD, gem5::SparcISA::MISCREG_QUEUE_NRES_ERROR_TAIL, gem5::SparcISA::MISCREG_QUEUE_RES_ERROR_HEAD, gem5::SparcISA::MISCREG_QUEUE_RES_ERROR_TAIL, gem5::SparcISA::MISCREG_SOFTINT, gem5::SparcISA::MISCREG_SOFTINT_CLR, gem5::SparcISA::MISCREG_SOFTINT_SET, gem5::SparcISA::MISCREG_STICK_CMPR, gem5::SparcISA::MISCREG_STRAND_STS_REG, gem5::SparcISA::MISCREG_TICK_CMPR, panic, gem5::BaseCPU::postInterrupt(), gem5::Workload::recordQuiesce(), res_error_head, res_error_tail, gem5::EventManager::schedule(), gem5::Event::scheduled(), setMiscReg(), setMiscRegNoEffect(), softint, stick, stick_cmpr, sTickCompare, gem5::ThreadContext::suspend(), gem5::BaseISA::tc, tick, tick_cmpr, tickCompare, tl, gem5::X86ISA::val, and gem5::System::workload.

Referenced by setMiscReg().

setMiscReg()

void gem5::SparcISA::ISA::setMiscReg	(	int	miscReg,
		RegVal	val
	)

Definition at line 746 of file isa.cc.

References gem5::BaseCPU::clearInterrupt(), CurrentGlobalsOffset, CurrentWindowOffset, DPRINTF, gem5::ThreadContext::getCpuPtr(), gem5::ThreadContext::getDecoderPtr(), hpstate, installGlobals(), installWindow(), gem5::BaseCPU::instCount(), gem5::SparcISA::IT_TRAP_LEVEL_ZERO, gem5::mbits(), gem5::SparcISA::MISCREG_ASI, gem5::SparcISA::MISCREG_CWP, gem5::SparcISA::MISCREG_FPRS, gem5::SparcISA::MISCREG_GL, gem5::SparcISA::MISCREG_HINTP, gem5::SparcISA::MISCREG_HPSTATE, gem5::SparcISA::MISCREG_HSTICK_CMPR, gem5::SparcISA::MISCREG_HTBA, gem5::SparcISA::MISCREG_HTSTATE, gem5::SparcISA::MISCREG_HVER, gem5::SparcISA::MISCREG_PCR, gem5::SparcISA::MISCREG_PIL, gem5::SparcISA::MISCREG_PSTATE, gem5::SparcISA::MISCREG_QUEUE_CPU_MONDO_HEAD, gem5::SparcISA::MISCREG_QUEUE_CPU_MONDO_TAIL, gem5::SparcISA::MISCREG_QUEUE_DEV_MONDO_HEAD, gem5::SparcISA::MISCREG_QUEUE_DEV_MONDO_TAIL, gem5::SparcISA::MISCREG_QUEUE_NRES_ERROR_HEAD, gem5::SparcISA::MISCREG_QUEUE_NRES_ERROR_TAIL, gem5::SparcISA::MISCREG_QUEUE_RES_ERROR_HEAD, gem5::SparcISA::MISCREG_QUEUE_RES_ERROR_TAIL, gem5::SparcISA::MISCREG_SOFTINT, gem5::SparcISA::MISCREG_SOFTINT_CLR, gem5::SparcISA::MISCREG_SOFTINT_SET, gem5::SparcISA::MISCREG_STICK, gem5::SparcISA::MISCREG_STICK_CMPR, gem5::SparcISA::MISCREG_STRAND_STS_REG, gem5::SparcISA::MISCREG_TICK, gem5::SparcISA::MISCREG_TICK_CMPR, gem5::SparcISA::MISCREG_TL, NextGlobalsOffset, NextWindowOffset, gem5::SparcISA::NWindows, gem5::BaseCPU::postInterrupt(), PreviousGlobalsOffset, PreviousWindowOffset, pstate, gem5::SparcISA::PstateMask, setFSReg(), setMiscRegNoEffect(), stick, gem5::BaseISA::tc, tick, tl, and gem5::X86ISA::val.

Referenced by processHSTickCompare(), processSTickCompare(), and setFSReg().

setMiscRegNoEffect()

void gem5::SparcISA::ISA::setMiscRegNoEffect	(	int	miscReg,
		RegVal	val
	)

Privilged Registers

Hyper privileged registers

Floating Point Status Register

Definition at line 565 of file isa.cc.

References asi, cpu_mondo_head, cpu_mondo_tail, cwp, dev_mondo_head, dev_mondo_tail, DPRINTF, fprs, fsr, gl, gsr, hintp, hpstate, hstick_cmpr, htba, htstate, lsuCtrlReg, gem5::SparcISA::MISCREG_ASI, gem5::SparcISA::MISCREG_CWP, gem5::SparcISA::MISCREG_FPRS, gem5::SparcISA::MISCREG_FSR, gem5::SparcISA::MISCREG_GL, gem5::SparcISA::MISCREG_GSR, gem5::SparcISA::MISCREG_HINTP, gem5::SparcISA::MISCREG_HPSTATE, gem5::SparcISA::MISCREG_HSTICK_CMPR, gem5::SparcISA::MISCREG_HTBA, gem5::SparcISA::MISCREG_HTSTATE, gem5::SparcISA::MISCREG_MMU_LSU_CTRL, gem5::SparcISA::MISCREG_MMU_P_CONTEXT, gem5::SparcISA::MISCREG_MMU_PART_ID, gem5::SparcISA::MISCREG_MMU_S_CONTEXT, gem5::SparcISA::MISCREG_PCR, gem5::SparcISA::MISCREG_PIC, gem5::SparcISA::MISCREG_PIL, gem5::SparcISA::MISCREG_PRIVTICK, gem5::SparcISA::MISCREG_PSTATE, gem5::SparcISA::MISCREG_QUEUE_CPU_MONDO_HEAD, gem5::SparcISA::MISCREG_QUEUE_CPU_MONDO_TAIL, gem5::SparcISA::MISCREG_QUEUE_DEV_MONDO_HEAD, gem5::SparcISA::MISCREG_QUEUE_DEV_MONDO_TAIL, gem5::SparcISA::MISCREG_QUEUE_NRES_ERROR_HEAD, gem5::SparcISA::MISCREG_QUEUE_NRES_ERROR_TAIL, gem5::SparcISA::MISCREG_QUEUE_RES_ERROR_HEAD, gem5::SparcISA::MISCREG_QUEUE_RES_ERROR_TAIL, gem5::SparcISA::MISCREG_SCRATCHPAD_R0, gem5::SparcISA::MISCREG_SCRATCHPAD_R1, gem5::SparcISA::MISCREG_SCRATCHPAD_R2, gem5::SparcISA::MISCREG_SCRATCHPAD_R3, gem5::SparcISA::MISCREG_SCRATCHPAD_R4, gem5::SparcISA::MISCREG_SCRATCHPAD_R5, gem5::SparcISA::MISCREG_SCRATCHPAD_R6, gem5::SparcISA::MISCREG_SCRATCHPAD_R7, gem5::SparcISA::MISCREG_SOFTINT, gem5::SparcISA::MISCREG_STICK, gem5::SparcISA::MISCREG_STICK_CMPR, gem5::SparcISA::MISCREG_STRAND_STS_REG, gem5::SparcISA::MISCREG_TBA, gem5::SparcISA::MISCREG_TICK, gem5::SparcISA::MISCREG_TICK_CMPR, gem5::SparcISA::MISCREG_TL, gem5::SparcISA::MISCREG_TNPC, gem5::SparcISA::MISCREG_TPC, gem5::SparcISA::MISCREG_TSTATE, gem5::SparcISA::MISCREG_TT, nres_error_head, nres_error_tail, panic, partId, pil, priContext, pstate, gem5::SparcISA::PstateMask, res_error_head, res_error_tail, scratchPad, secContext, softint, stick, stick_cmpr, strandStatusReg, tba, tick, tick_cmpr, tl, tnpc, tpc, tstate, tt, and gem5::X86ISA::val.

Referenced by setFSReg(), and setMiscReg().

unserialize()

void gem5::SparcISA::ISA::unserialize ( CheckpointIn &  cp )

overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters

cp	Checkpoint state

Implements gem5::Serializable.

Definition at line 877 of file isa.cc.

References asi, cpu_mondo_head, cpu_mondo_tail, cwp, dev_mondo_head, dev_mondo_tail, fprs, fsr, gl, gsr, hintp, hpstate, hstick_cmpr, hSTickCompare, htba, htstate, lsuCtrlReg, gem5::SparcISA::MaxTL, nres_error_head, nres_error_tail, partId, pil, priContext, pstate, reloadRegMap(), res_error_head, res_error_tail, gem5::EventManager::schedule(), scratchPad, secContext, softint, stick, stick_cmpr, sTickCompare, strandStatusReg, tba, tick, tick_cmpr, tickCompare, tl, tnpc, tpc, tstate, tt, UNSERIALIZE_ARRAY, and UNSERIALIZE_SCALAR.

Member Data Documentation

asi

uint8_t gem5::SparcISA::ISA::asi

private

Definition at line 60 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

cpu_mondo_head

uint64_t gem5::SparcISA::ISA::cpu_mondo_head

private

Definition at line 111 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscRegNoEffect(), and unserialize().

cpu_mondo_tail

uint64_t gem5::SparcISA::ISA::cpu_mondo_tail

private

Definition at line 112 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscRegNoEffect(), and unserialize().

cwp

uint8_t gem5::SparcISA::ISA::cwp

private

Definition at line 83 of file isa.hh.

Referenced by clear(), installWindow(), readMiscRegNoEffect(), reloadRegMap(), serialize(), setMiscRegNoEffect(), and unserialize().

dev_mondo_head

uint64_t gem5::SparcISA::ISA::dev_mondo_head

private

Definition at line 113 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscRegNoEffect(), and unserialize().

dev_mondo_tail

uint64_t gem5::SparcISA::ISA::dev_mondo_tail

private

Definition at line 114 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscRegNoEffect(), and unserialize().

fprs

uint8_t gem5::SparcISA::ISA::fprs

private

Definition at line 62 of file isa.hh.

Referenced by clear(), readMiscReg(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

fsr

uint64_t gem5::SparcISA::ISA::fsr

private

Floating point misc registers.

Definition at line 101 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

gl

uint8_t gem5::SparcISA::ISA::gl

private

Definition at line 89 of file isa.hh.

Referenced by clear(), installGlobals(), readMiscRegNoEffect(), reloadRegMap(), serialize(), setMiscRegNoEffect(), and unserialize().

gsr

uint64_t gem5::SparcISA::ISA::gsr

private

Definition at line 63 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

hintp

uint64_t gem5::SparcISA::ISA::hintp

private

Definition at line 94 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscRegNoEffect(), and unserialize().

hpstate

HPSTATE gem5::SparcISA::ISA::hpstate

private

Hyperprivileged Registers.

Definition at line 92 of file isa.hh.

Referenced by clear(), inUserMode(), isHyperPriv(), isPriv(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscReg(), setMiscRegNoEffect(), and unserialize().

hstick_cmpr

uint64_t gem5::SparcISA::ISA::hstick_cmpr

private

Definition at line 96 of file isa.hh.

Referenced by clear(), processHSTickCompare(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscRegNoEffect(), and unserialize().

hSTickCompare

HSTickCompareEvent* gem5::SparcISA::ISA::hSTickCompare = nullptr

private

Definition at line 141 of file isa.hh.

Referenced by clear(), processHSTickCompare(), serialize(), setFSReg(), and unserialize().

htba

uint64_t gem5::SparcISA::ISA::htba

private

Definition at line 95 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

htstate

uint64_t gem5::SparcISA::ISA::htstate[MaxTL]

private

Definition at line 93 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

intRegMap

RegIndex gem5::SparcISA::ISA::intRegMap[TotalInstIntRegs]

private

Definition at line 163 of file isa.hh.

Referenced by flattenIntIndex(), installGlobals(), installWindow(), and reloadRegMap().

lsuCtrlReg

uint64_t gem5::SparcISA::ISA::lsuCtrlReg

private

Definition at line 107 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

nres_error_head

uint64_t gem5::SparcISA::ISA::nres_error_head

private

Definition at line 117 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

nres_error_tail

uint64_t gem5::SparcISA::ISA::nres_error_tail

private

Definition at line 118 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

NumGlobalRegs

const int gem5::SparcISA::ISA::NumGlobalRegs = 8

staticprivate

Definition at line 143 of file isa.hh.

Referenced by installGlobals().

NumWindowedRegs

const int gem5::SparcISA::ISA::NumWindowedRegs = 24

staticprivate

Definition at line 144 of file isa.hh.

Referenced by installWindow().

partId

uint16_t gem5::SparcISA::ISA::partId

private

Definition at line 106 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

pil

uint8_t gem5::SparcISA::ISA::pil

private

Definition at line 82 of file isa.hh.

Referenced by checkSoftInt(), clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

priContext

uint16_t gem5::SparcISA::ISA::priContext

private

MMU Internal Registers.

Definition at line 104 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

pstate

PSTATE gem5::SparcISA::ISA::pstate

private

Definition at line 80 of file isa.hh.

Referenced by clear(), inUserMode(), isPriv(), readMiscRegNoEffect(), serialize(), setMiscReg(), setMiscRegNoEffect(), and unserialize().

RegsPerWindow

const int gem5::SparcISA::ISA::RegsPerWindow = NumWindowedRegs - WindowOverlap

staticprivate

Definition at line 148 of file isa.hh.

Referenced by installWindow().

res_error_head

uint64_t gem5::SparcISA::ISA::res_error_head

private

Definition at line 115 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscRegNoEffect(), and unserialize().

res_error_tail

uint64_t gem5::SparcISA::ISA::res_error_tail

private

Definition at line 116 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscRegNoEffect(), and unserialize().

scratchPad

uint64_t gem5::SparcISA::ISA::scratchPad[8]

private

Definition at line 109 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

secContext

uint16_t gem5::SparcISA::ISA::secContext

private

Definition at line 105 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

softint

uint64_t gem5::SparcISA::ISA::softint

private

Definition at line 64 of file isa.hh.

Referenced by checkSoftInt(), clear(), processSTickCompare(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscRegNoEffect(), and unserialize().

stick

uint64_t gem5::SparcISA::ISA::stick

private

Definition at line 66 of file isa.hh.

Referenced by clear(), processHSTickCompare(), processSTickCompare(), readMiscReg(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscReg(), setMiscRegNoEffect(), and unserialize().

stick_cmpr

uint64_t gem5::SparcISA::ISA::stick_cmpr

private

Definition at line 67 of file isa.hh.

Referenced by clear(), processHSTickCompare(), processSTickCompare(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscRegNoEffect(), and unserialize().

sTickCompare

STickCompareEvent* gem5::SparcISA::ISA::sTickCompare = nullptr

private

Definition at line 138 of file isa.hh.

Referenced by clear(), processSTickCompare(), serialize(), setFSReg(), and unserialize().

strandStatusReg

uint64_t gem5::SparcISA::ISA::strandStatusReg

private

Definition at line 98 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

tba

uint64_t gem5::SparcISA::ISA::tba

private

Definition at line 78 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

tick

uint64_t gem5::SparcISA::ISA::tick

private

Definition at line 61 of file isa.hh.

Referenced by clear(), readMiscReg(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscReg(), setMiscRegNoEffect(), and unserialize().

tick_cmpr

uint64_t gem5::SparcISA::ISA::tick_cmpr

private

Definition at line 65 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscRegNoEffect(), and unserialize().

tickCompare

TickCompareEvent* gem5::SparcISA::ISA::tickCompare = nullptr

private

Definition at line 135 of file isa.hh.

Referenced by clear(), serialize(), setFSReg(), and unserialize().

tl

uint8_t gem5::SparcISA::ISA::tl

private

Definition at line 81 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setFSReg(), setMiscReg(), setMiscRegNoEffect(), and unserialize().

tnpc

uint64_t gem5::SparcISA::ISA::tnpc[MaxTL]

private

Definition at line 73 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

TotalGlobals

const int gem5::SparcISA::ISA::TotalGlobals = (MaxGL + 1) * NumGlobalRegs

staticprivate

Definition at line 147 of file isa.hh.

Referenced by installWindow(), and reloadRegMap().

TotalWindowed

const int gem5::SparcISA::ISA::TotalWindowed = NWindows * RegsPerWindow

staticprivate

Definition at line 149 of file isa.hh.

Referenced by installWindow().

tpc

uint64_t gem5::SparcISA::ISA::tpc[MaxTL]

private

Definition at line 71 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

tstate

uint64_t gem5::SparcISA::ISA::tstate[MaxTL]

private

Definition at line 75 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

tt

uint16_t gem5::SparcISA::ISA::tt[MaxTL]

private

Definition at line 76 of file isa.hh.

Referenced by clear(), readMiscRegNoEffect(), serialize(), setMiscRegNoEffect(), and unserialize().

WindowOverlap

const int gem5::SparcISA::ISA::WindowOverlap = 8

staticprivate

Definition at line 145 of file isa.hh.

---

The documentation for this class was generated from the following files:

• arch/sparc/isa.hh
• arch/sparc/isa.cc
• arch/sparc/ua2005.cc