| activate() override | gem5::o3::ThreadContext | virtual |
| Active enum value | gem5::ThreadContext | |
| clearArchRegs() override | gem5::o3::ThreadContext | virtual |
| compare(ThreadContext *one, ThreadContext *two) | gem5::ThreadContext | static |
| conditionalSquash() | gem5::o3::ThreadContext | inline |
| contextId() const override | gem5::o3::ThreadContext | inlinevirtual |
| copyArchRegs(gem5::ThreadContext *tc) override | gem5::o3::ThreadContext | virtual |
| cpu | gem5::o3::ThreadContext | |
| cpuId() const override | gem5::o3::ThreadContext | inlinevirtual |
| DefaultFloatResult | gem5::ThreadContext | static |
| DefaultIntResult | gem5::ThreadContext | static |
| descheduleInstCountEvent(Event *event) override | gem5::o3::ThreadContext | inlinevirtual |
| exit() | gem5::ThreadContext | inlinevirtual |
| flattenRegId(const RegId ®Id) const override | gem5::o3::ThreadContext | virtual |
| floatResult | gem5::ThreadContext | |
| floats | gem5::ThreadContext | static |
| getCheckerCpuPtr() override | gem5::o3::ThreadContext | inlinevirtual |
| getCpuPtr() override | gem5::o3::ThreadContext | inlinevirtual |
| getCurrentInstCount() override | gem5::o3::ThreadContext | inlinevirtual |
| getDecoderPtr() override | gem5::o3::ThreadContext | inlinevirtual |
| getHtmCheckpointPtr() override | gem5::o3::ThreadContext | virtual |
| getIsaPtr() override | gem5::o3::ThreadContext | inlinevirtual |
| getMMUPtr() override | gem5::o3::ThreadContext | inlinevirtual |
| getProcessPtr() override | gem5::o3::ThreadContext | inlinevirtual |
| getSystemPtr() override | gem5::o3::ThreadContext | inlinevirtual |
| getUseForClone() | gem5::ThreadContext | inline |
| getVirtProxy() override | gem5::o3::ThreadContext | virtual |
| getWritableVecPredReg(const RegId &id) override | gem5::o3::ThreadContext | inlinevirtual |
| getWritableVecPredRegFlat(RegIndex idx) override | gem5::o3::ThreadContext | virtual |
| getWritableVecReg(const RegId &id) override | gem5::o3::ThreadContext | inlinevirtual |
| getWritableVecRegFlat(RegIndex idx) override | gem5::o3::ThreadContext | virtual |
| halt() override | gem5::o3::ThreadContext | virtual |
| Halted enum value | gem5::ThreadContext | |
| Halting enum value | gem5::ThreadContext | |
| htmAbortTransaction(uint64_t htm_uid, HtmFailureFaultCause cause) override | gem5::o3::ThreadContext | virtual |
| initMemProxies(gem5::ThreadContext *tc) override | gem5::o3::ThreadContext | inlinevirtual |
| instAddr() const override | gem5::o3::ThreadContext | inlinevirtual |
| intOffset | gem5::ThreadContext | |
| intResult | gem5::ThreadContext | |
| ints | gem5::ThreadContext | static |
| microPC() const override | gem5::o3::ThreadContext | inlinevirtual |
| nextInstAddr() const override | gem5::o3::ThreadContext | inlinevirtual |
| pcState() const override | gem5::o3::ThreadContext | inlinevirtual |
| pcState(const TheISA::PCState &val) override | gem5::o3::ThreadContext | virtual |
| pcStateNoRecord(const TheISA::PCState &val) override | gem5::o3::ThreadContext | virtual |
| quiesce() | gem5::ThreadContext | |
| quiesceTick(Tick resume) | gem5::ThreadContext | |
| readCCReg(RegIndex reg_idx) const override | gem5::o3::ThreadContext | inlinevirtual |
| readCCRegFlat(RegIndex idx) const override | gem5::o3::ThreadContext | virtual |
| readFloatReg(RegIndex reg_idx) const override | gem5::o3::ThreadContext | inlinevirtual |
| readFloatRegFlat(RegIndex idx) const override | gem5::o3::ThreadContext | virtual |
| readIntReg(RegIndex reg_idx) const override | gem5::o3::ThreadContext | inlinevirtual |
| readIntRegFlat(RegIndex idx) const override | gem5::o3::ThreadContext | virtual |
| readLastActivate() override | gem5::o3::ThreadContext | virtual |
| readLastSuspend() override | gem5::o3::ThreadContext | virtual |
| readMiscReg(RegIndex misc_reg) override | gem5::o3::ThreadContext | inlinevirtual |
| readMiscRegNoEffect(RegIndex misc_reg) const override | gem5::o3::ThreadContext | inlinevirtual |
| readReg(RegIndex reg_idx) | gem5::o3::ThreadContext | inline |
| readStCondFailures() const override | gem5::o3::ThreadContext | inlinevirtual |
| readVecElem(const RegId ®) const override | gem5::o3::ThreadContext | inlinevirtual |
| readVecElemFlat(RegIndex idx, const ElemIndex &elemIndex) const override | gem5::o3::ThreadContext | virtual |
| readVecPredReg(const RegId &id) const override | gem5::o3::ThreadContext | inlinevirtual |
| readVecPredRegFlat(RegIndex idx) const override | gem5::o3::ThreadContext | virtual |
| readVecReg(const RegId &id) const override | gem5::o3::ThreadContext | inlinevirtual |
| readVecRegFlat(RegIndex idx) const override | gem5::o3::ThreadContext | virtual |
| regStats(const std::string &name) | gem5::ThreadContext | inlinevirtual |
| remove(PCEvent *e) override | gem5::o3::ThreadContext | inlinevirtual |
| schedule(PCEvent *e) override | gem5::o3::ThreadContext | inlinevirtual |
| scheduleInstCountEvent(Event *event, Tick count) override | gem5::o3::ThreadContext | inlinevirtual |
| sendFunctional(PacketPtr pkt) | gem5::ThreadContext | virtual |
| setCCReg(RegIndex reg_idx, RegVal val) override | gem5::o3::ThreadContext | inlinevirtual |
| setCCRegFlat(RegIndex idx, RegVal val) override | gem5::o3::ThreadContext | virtual |
| setContextId(ContextID id) override | gem5::o3::ThreadContext | inlinevirtual |
| setFloatReg(RegIndex reg_idx, RegVal val) override | gem5::o3::ThreadContext | inlinevirtual |
| setFloatRegFlat(RegIndex idx, RegVal val) override | gem5::o3::ThreadContext | virtual |
| setHtmCheckpointPtr(BaseHTMCheckpointPtr new_cpt) override | gem5::o3::ThreadContext | virtual |
| setIntReg(RegIndex reg_idx, RegVal val) override | gem5::o3::ThreadContext | inlinevirtual |
| setIntRegFlat(RegIndex idx, RegVal val) override | gem5::o3::ThreadContext | virtual |
| setMiscReg(RegIndex misc_reg, RegVal val) override | gem5::o3::ThreadContext | virtual |
| setMiscRegNoEffect(RegIndex misc_reg, RegVal val) override | gem5::o3::ThreadContext | virtual |
| setNPC(Addr val) | gem5::ThreadContext | inline |
| setProcessPtr(Process *p) override | gem5::o3::ThreadContext | inlinevirtual |
| setStatus(Status new_status) override | gem5::o3::ThreadContext | inlinevirtual |
| setStCondFailures(unsigned sc_failures) override | gem5::o3::ThreadContext | inlinevirtual |
| setThreadId(int id) override | gem5::o3::ThreadContext | inlinevirtual |
| setUseForClone(bool new_val) | gem5::ThreadContext | inline |
| setVecElem(const RegId ®, const TheISA::VecElem &val) override | gem5::o3::ThreadContext | inlinevirtual |
| setVecElemFlat(RegIndex idx, const ElemIndex &elemIdx, const TheISA::VecElem &val) override | gem5::o3::ThreadContext | virtual |
| setVecPredReg(const RegId ®, const TheISA::VecPredRegContainer &val) override | gem5::o3::ThreadContext | inlinevirtual |
| setVecPredRegFlat(RegIndex idx, const TheISA::VecPredRegContainer &val) override | gem5::o3::ThreadContext | virtual |
| setVecReg(const RegId ®, const TheISA::VecRegContainer &val) override | gem5::o3::ThreadContext | inlinevirtual |
| setVecRegFlat(RegIndex idx, const TheISA::VecRegContainer &val) override | gem5::o3::ThreadContext | virtual |
| socketId() const override | gem5::o3::ThreadContext | inlinevirtual |
| status() const override | gem5::o3::ThreadContext | inlinevirtual |
| Status enum name | gem5::ThreadContext | |
| suspend() override | gem5::o3::ThreadContext | virtual |
| Suspended enum value | gem5::ThreadContext | |
| takeOverFrom(gem5::ThreadContext *old_context) override | gem5::o3::ThreadContext | virtual |
| thread | gem5::o3::ThreadContext | |
| threadId() const override | gem5::o3::ThreadContext | inlinevirtual |
| useForClone | gem5::ThreadContext | protected |
| ~ThreadContext() | gem5::ThreadContext | inlinevirtual |