Unified register rename map for all classes of registers. More...

#include <rename_map.hh>

Public Types
typedef SimpleRenameMap::RenameInfo	RenameInfo

Public Member Functions
	UnifiedRenameMap ()
	Default constructor. More...

	~UnifiedRenameMap ()
	Destructor. More...

void	init (const BaseISA::RegClasses &regClasses, PhysRegFile _regFile, UnifiedFreeList freeList, VecMode _mode)
	Initializes rename map with given parameters. More...

RenameInfo	rename (const RegId &arch_reg)
	Tell rename map to get a new free physical register to remap the specified architectural register. More...

PhysRegIdPtr	lookup (const RegId &arch_reg) const
	Look up the physical register mapped to an architectural register. More...

void	setEntry (const RegId &arch_reg, PhysRegIdPtr phys_reg)
	Update rename map with a specific mapping. More...

unsigned	numFreeEntries () const
	Return the minimum number of free entries across all of the register classes. More...

unsigned	numFreeIntEntries () const

unsigned	numFreeFloatEntries () const

unsigned	numFreeVecEntries () const

unsigned	numFreePredEntries () const

unsigned	numFreeCCEntries () const

bool	canRename (uint32_t intRegs, uint32_t floatRegs, uint32_t vectorRegs, uint32_t vecElemRegs, uint32_t vecPredRegs, uint32_t ccRegs) const
	Return whether there are enough registers to serve the request. More...

void	switchMode (VecMode newVecMode)
	Set vector mode to Full or Elem. More...

void	switchFreeList (UnifiedFreeList *freeList)
	Switch freeList of registers from Full to Elem or vicevers depending on vecMode (vector renaming mode). More...

Private Types
using	VecMode = enums::VecRegRenameMode

Private Attributes
SimpleRenameMap	intMap
	The integer register rename map. More...

SimpleRenameMap	floatMap
	The floating-point register rename map. More...

SimpleRenameMap	ccMap
	The condition-code register rename map. More...

SimpleRenameMap	vecMap
	The vector register rename map. More...

SimpleRenameMap	vecElemMap
	The vector element register rename map. More...

SimpleRenameMap	predMap
	The predicate register rename map. More...

VecMode	vecMode

PhysRegFile *	regFile
	The register file object is used only to get PhysRegIdPtr on MiscRegs, as they are stored in it. More...

Detailed Description

Unified register rename map for all classes of registers.

Wraps a set of class-specific rename maps. Methods that do not specify a register class (e.g., rename()) take register ids, while methods that do specify a register class (e.g., renameInt()) take register indices.

Definition at line 174 of file rename_map.hh.

Member Typedef Documentation

◆ RenameInfo

typedef SimpleRenameMap::RenameInfo gem5::o3::UnifiedRenameMap::RenameInfo

Definition at line 206 of file rename_map.hh.

◆ VecMode

using gem5::o3::UnifiedRenameMap::VecMode = enums::VecRegRenameMode

private

Definition at line 195 of file rename_map.hh.

Constructor & Destructor Documentation

◆ UnifiedRenameMap()

gem5::o3::UnifiedRenameMap::UnifiedRenameMap ( )

inline

Default constructor.

init() must be called prior to use.

Definition at line 209 of file rename_map.hh.

◆ ~UnifiedRenameMap()

gem5::o3::UnifiedRenameMap::~UnifiedRenameMap ( )

inline

Destructor.

Definition at line 212 of file rename_map.hh.

Member Function Documentation

◆ canRename()

bool gem5::o3::UnifiedRenameMap::canRename	(	uint32_t	intRegs,
		uint32_t	floatRegs,
		uint32_t	vectorRegs,
		uint32_t	vecElemRegs,
		uint32_t	vecPredRegs,
		uint32_t	ccRegs
	)		const

inline

Return whether there are enough registers to serve the request.

Definition at line 379 of file rename_map.hh.

References ccMap, floatMap, intMap, gem5::o3::SimpleRenameMap::numFreeEntries(), predMap, vecElemMap, and vecMap.

◆ init()

void gem5::o3::UnifiedRenameMap::init	(	const BaseISA::RegClasses &	regClasses,
		PhysRegFile *	_regFile,
		UnifiedFreeList *	freeList,
		VecMode	_mode
	)

Initializes rename map with given parameters.

Definition at line 113 of file rename_map.cc.

References gem5::o3::UnifiedFreeList::ccList, ccMap, gem5::CCRegClass, gem5::o3::UnifiedFreeList::floatList, floatMap, gem5::FloatRegClass, gem5::o3::SimpleRenameMap::init(), gem5::o3::UnifiedFreeList::intList, intMap, gem5::IntRegClass, gem5::o3::UnifiedFreeList::predList, predMap, regFile, gem5::VecElemClass, gem5::o3::UnifiedFreeList::vecElemList, vecElemMap, gem5::o3::UnifiedFreeList::vecList, vecMap, vecMode, gem5::VecPredRegClass, and gem5::VecRegClass.

◆ lookup()

PhysRegIdPtr gem5::o3::UnifiedRenameMap::lookup ( const RegId & arch_reg ) const

inline

Look up the physical register mapped to an architectural register.

This version takes a flattened architectural register id and calls the appropriate class-specific rename table.

Parameters

arch_reg The architectural register to look up.

Returns: The physical register it is currently mapped to.

Definition at line 266 of file rename_map.hh.

References ccMap, gem5::CCRegClass, gem5::RegId::className(), gem5::RegId::classValue(), gem5::RegId::flatIndex(), floatMap, gem5::FloatRegClass, gem5::o3::PhysRegFile::getMiscRegId(), intMap, gem5::IntRegClass, gem5::o3::SimpleRenameMap::lookup(), gem5::MiscRegClass, panic, predMap, regFile, gem5::VecElemClass, vecElemMap, vecMap, vecMode, gem5::VecPredRegClass, and gem5::VecRegClass.

Referenced by gem5::o3::CPU::getWritableArchVecPredReg(), gem5::o3::CPU::getWritableArchVecReg(), gem5::o3::CPU::readArchCCReg(), gem5::o3::CPU::readArchFloatReg(), gem5::o3::CPU::readArchIntReg(), gem5::o3::CPU::readArchVecElem(), gem5::o3::CPU::readArchVecPredReg(), gem5::o3::CPU::readArchVecReg(), rename(), gem5::o3::Rename::renameSrcRegs(), gem5::o3::CPU::setArchCCReg(), gem5::o3::CPU::setArchFloatReg(), gem5::o3::CPU::setArchIntReg(), gem5::o3::CPU::setArchVecElem(), gem5::o3::CPU::setArchVecPredReg(), gem5::o3::CPU::setArchVecReg(), and setEntry().

◆ numFreeCCEntries()

unsigned gem5::o3::UnifiedRenameMap::numFreeCCEntries ( ) const

inline

Definition at line 373 of file rename_map.hh.

References ccMap, and gem5::o3::SimpleRenameMap::numFreeEntries().

◆ numFreeEntries()

unsigned gem5::o3::UnifiedRenameMap::numFreeEntries ( ) const

inline

Return the minimum number of free entries across all of the register classes.

The minimum is used so we guarantee that this number of entries is available regardless of which class of registers is requested.

Definition at line 354 of file rename_map.hh.

References floatMap, intMap, gem5::o3::SimpleRenameMap::numFreeEntries(), predMap, vecElemMap, vecMap, and vecMode.

◆ numFreeFloatEntries()

unsigned gem5::o3::UnifiedRenameMap::numFreeFloatEntries ( ) const

inline

Definition at line 364 of file rename_map.hh.

References floatMap, and gem5::o3::SimpleRenameMap::numFreeEntries().

◆ numFreeIntEntries()

unsigned gem5::o3::UnifiedRenameMap::numFreeIntEntries ( ) const

inline

Definition at line 363 of file rename_map.hh.

References intMap, and gem5::o3::SimpleRenameMap::numFreeEntries().

◆ numFreePredEntries()

unsigned gem5::o3::UnifiedRenameMap::numFreePredEntries ( ) const

inline

Definition at line 372 of file rename_map.hh.

References gem5::o3::SimpleRenameMap::numFreeEntries(), and predMap.

◆ numFreeVecEntries()

unsigned gem5::o3::UnifiedRenameMap::numFreeVecEntries ( ) const

inline

Definition at line 366 of file rename_map.hh.

References gem5::o3::SimpleRenameMap::numFreeEntries(), vecElemMap, vecMap, and vecMode.

◆ rename()

RenameInfo gem5::o3::UnifiedRenameMap::rename ( const RegId & arch_reg )

inline

Tell rename map to get a new free physical register to remap the specified architectural register.

This version takes a RegId and reads the appropriate class-specific rename table.

Parameters

arch_reg The architectural register id to remap.

Returns: A RenameInfo pair indicating both the new and previous physical registers.

Definition at line 226 of file rename_map.hh.

References ccMap, gem5::CCRegClass, gem5::RegId::className(), gem5::RegId::classValue(), floatMap, gem5::FloatRegClass, intMap, gem5::IntRegClass, lookup(), gem5::MiscRegClass, panic, predMap, gem5::o3::SimpleRenameMap::rename(), gem5::VecElemClass, vecElemMap, vecMap, vecMode, gem5::VecPredRegClass, and gem5::VecRegClass.

Referenced by gem5::o3::Rename::renameDestRegs().

◆ setEntry()

void gem5::o3::UnifiedRenameMap::setEntry	(	const RegId &	arch_reg,
		PhysRegIdPtr	phys_reg
	)

inline

Update rename map with a specific mapping.

Generally used to roll back to old mappings on a squash. This version takes a flattened architectural register id and calls the appropriate class-specific rename table.

Parameters

arch_reg	The architectural register to remap.
phys_reg	The physical register to remap it to.

Definition at line 309 of file rename_map.hh.

References ccMap, gem5::CCRegClass, gem5::RegId::className(), gem5::RegId::classValue(), floatMap, gem5::FloatRegClass, intMap, gem5::IntRegClass, gem5::PhysRegId::is(), lookup(), gem5::MiscRegClass, panic, predMap, gem5::o3::SimpleRenameMap::setEntry(), gem5::VecElemClass, vecElemMap, vecMap, vecMode, gem5::VecPredRegClass, and gem5::VecRegClass.

Referenced by gem5::o3::Commit::commitHead(), gem5::o3::Rename::doSquash(), gem5::o3::CPU::insertThread(), and switchMode().

◆ switchFreeList()

void gem5::o3::UnifiedRenameMap::switchFreeList ( UnifiedFreeList * freeList )

Switch freeList of registers from Full to Elem or vicevers depending on vecMode (vector renaming mode).

Definition at line 129 of file rename_map.cc.

References gem5::o3::UnifiedFreeList::addRegs(), gem5::o3::PhysRegFile::getRegElemIds(), gem5::o3::PhysRegFile::getRegIds(), gem5::o3::UnifiedFreeList::getVecElem(), gem5::o3::UnifiedFreeList::getVecReg(), gem5::o3::UnifiedFreeList::hasFreeVecElems(), gem5::o3::UnifiedFreeList::hasFreeVecRegs(), gem5::o3::SimpleRenameMap::numArchRegs(), gem5::o3::UnifiedFreeList::numFreeVecElems(), gem5::o3::UnifiedFreeList::numFreeVecRegs(), gem5::o3::PhysRegFile::numVecElemPhysRegs(), gem5::o3::PhysRegFile::numVecPhysRegs(), panic_if, regFile, vecElemMap, vecMap, vecMode, and gem5::VecRegClass.

Referenced by gem5::o3::CPU::switchRenameMode().

◆ switchMode()

void gem5::o3::UnifiedRenameMap::switchMode ( VecMode newVecMode )

Set vector mode to Full or Elem.

Ignore 'silent' modifications.

Parameters

newVecMode new vector renaming mode

Definition at line 166 of file rename_map.cc.

References gem5::o3::PhysRegFile::getRegElemIds(), gem5::o3::PhysRegFile::getRegIds(), gem5::o3::PhysRegFile::getTrueId(), gem5::ArmISA::i, gem5::MipsISA::l, gem5::o3::SimpleRenameMap::lookup(), gem5::o3::SimpleRenameMap::numArchRegs(), gem5::o3::PhysRegFile::readVecElem(), regFile, setEntry(), gem5::o3::PhysRegFile::setVecReg(), gem5::PowerISA::vec, gem5::VecElemClass, vecElemMap, vecMap, vecMode, and gem5::VecRegClass.

Referenced by gem5::o3::CPU::switchRenameMode().

Member Data Documentation

◆ ccMap

SimpleRenameMap gem5::o3::UnifiedRenameMap::ccMap

private

The condition-code register rename map.

Definition at line 184 of file rename_map.hh.

Referenced by canRename(), init(), lookup(), numFreeCCEntries(), rename(), and setEntry().

◆ floatMap

SimpleRenameMap gem5::o3::UnifiedRenameMap::floatMap

private

The floating-point register rename map.

Definition at line 181 of file rename_map.hh.

Referenced by canRename(), init(), lookup(), numFreeEntries(), numFreeFloatEntries(), rename(), and setEntry().

◆ intMap

SimpleRenameMap gem5::o3::UnifiedRenameMap::intMap

private

The integer register rename map.

Definition at line 178 of file rename_map.hh.

Referenced by canRename(), init(), lookup(), numFreeEntries(), numFreeIntEntries(), rename(), and setEntry().

◆ predMap

SimpleRenameMap gem5::o3::UnifiedRenameMap::predMap

private

The predicate register rename map.

Definition at line 193 of file rename_map.hh.

Referenced by canRename(), init(), lookup(), numFreeEntries(), numFreePredEntries(), rename(), and setEntry().

◆ regFile

PhysRegFile* gem5::o3::UnifiedRenameMap::regFile

private

The register file object is used only to get PhysRegIdPtr on MiscRegs, as they are stored in it.

Definition at line 202 of file rename_map.hh.

Referenced by init(), lookup(), switchFreeList(), and switchMode().

◆ vecElemMap

SimpleRenameMap gem5::o3::UnifiedRenameMap::vecElemMap

private

The vector element register rename map.

Definition at line 190 of file rename_map.hh.

Referenced by canRename(), init(), lookup(), numFreeEntries(), numFreeVecEntries(), rename(), setEntry(), switchFreeList(), and switchMode().

◆ vecMap

SimpleRenameMap gem5::o3::UnifiedRenameMap::vecMap

private

The vector register rename map.

Definition at line 187 of file rename_map.hh.

Referenced by canRename(), init(), lookup(), numFreeEntries(), numFreeVecEntries(), rename(), setEntry(), switchFreeList(), and switchMode().

◆ vecMode

VecMode gem5::o3::UnifiedRenameMap::vecMode

private

Definition at line 196 of file rename_map.hh.

Referenced by init(), lookup(), numFreeEntries(), numFreeVecEntries(), rename(), setEntry(), switchFreeList(), and switchMode().

The documentation for this class was generated from the following files:

cpu/o3/rename_map.hh
cpu/o3/rename_map.cc

Public Types

Public Member Functions

Private Types

Private Attributes

Detailed Description

Member Typedef Documentation

◆ RenameInfo

◆ VecMode

Constructor & Destructor Documentation

◆ UnifiedRenameMap()

◆ ~UnifiedRenameMap()

Member Function Documentation

◆ canRename()

◆ init()

◆ lookup()

◆ numFreeCCEntries()

◆ numFreeEntries()

◆ numFreeFloatEntries()

◆ numFreeIntEntries()

◆ numFreePredEntries()

◆ numFreeVecEntries()

◆ rename()

◆ setEntry()

◆ switchFreeList()

◆ switchMode()

Member Data Documentation

◆ ccMap

◆ floatMap

◆ intMap

◆ predMap

◆ regFile

◆ vecElemMap

◆ vecMap

◆ vecMode