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   29 #ifndef __CPU_PRED_INDIRECT_BASE_HH__ 
   30 #define __CPU_PRED_INDIRECT_BASE_HH__ 
   32 #include "arch/pcstate.hh" 
   33 #include "config/the_isa.hh" 
   35 #include "params/IndirectPredictor.hh" 
   41 namespace branch_prediction
 
   48     typedef IndirectPredictorParams 
Params;
 
   60                         void * indirect_history) = 0;
 
   68                                            void * indirect_history,
 
   69                                            bool actually_taken) = 0;
 
   75 #endif // __CPU_PRED_INDIRECT_BASE_HH__ 
  
virtual void genIndirectInfo(ThreadID tid, void *&indirect_history)=0
virtual bool lookup(Addr br_addr, TheISA::PCState &br_target, ThreadID tid)=0
virtual void recordIndirect(Addr br_addr, Addr tgt_addr, InstSeqNum seq_num, ThreadID tid)=0
virtual void deleteIndirectInfo(ThreadID tid, void *indirect_history)=0
const Params & params() const
GenericISA::DelaySlotPCState< 4 > PCState
virtual void updateDirectionInfo(ThreadID tid, bool actually_taken)=0
Abstract superclass for simulation objects.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
virtual void commit(InstSeqNum seq_num, ThreadID tid, void *indirect_history)=0
IndirectPredictorParams Params
virtual void squash(InstSeqNum seq_num, ThreadID tid)=0
virtual void recordTarget(InstSeqNum seq_num, void *indirect_history, const TheISA::PCState &target, ThreadID tid)=0
virtual void changeDirectionPrediction(ThreadID tid, void *indirect_history, bool actually_taken)=0
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
IndirectPredictor(const Params ¶ms)
int16_t ThreadID
Thread index/ID type.
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