gem5
v21.1.0.2
arch
amdgpu
vega
gpu_types.hh
Go to the documentation of this file.
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/*
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* Copyright (c) 2015-2021 Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* For use for simulation and test purposes only
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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#ifndef __ARCH_VEGA_GPU_TYPES_HH__
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#define __ARCH_VEGA_GPU_TYPES_HH__
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#include <cstdint>
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namespace
gem5
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{
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namespace
VegaISA
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{
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union
InstFormat
;
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typedef
uint64_t
RawMachInst
;
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typedef
InstFormat
*
MachInst
;
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}
// namespace VegaISA
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}
// namespace gem5
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#endif // __ARCH_VEGA_GPU_TYPES_HH__
gem5::VegaISA::RawMachInst
uint64_t RawMachInst
used to represnt a GPU inst in its raw format.
Definition:
gpu_types.hh:44
gem5::VegaISA::MachInst
InstFormat * MachInst
used to represent the encoding of a VEGA inst.
Definition:
gpu_types.hh:63
gem5::VegaISA::InstFormat
Definition:
gpu_decoder.hh:1903
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition:
decoder.cc:40
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