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| | Checker (const Params &p) |
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| void | switchOut () |
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| void | takeOverFrom (BaseCPU *oldCPU) |
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| void | advancePC (const Fault &fault) |
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| void | verify (const DynInstPtr &inst) |
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| void | validateInst (const DynInstPtr &inst) |
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| void | validateExecution (const DynInstPtr &inst) |
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| void | validateState () |
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| void | copyResult (const DynInstPtr &inst, const InstResult &mismatch_val, int start_idx) |
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| void | handlePendingInt () |
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| void | init () override |
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| | PARAMS (CheckerCPU) |
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| | CheckerCPU (const Params &p) |
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| virtual | ~CheckerCPU () |
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| void | setSystem (System *system) |
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| void | setIcachePort (RequestPort *icache_port) |
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| void | setDcachePort (RequestPort *dcache_port) |
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| Port & | getDataPort () override |
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| Port & | getInstPort () override |
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| BaseMMU * | getMMUPtr () |
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| virtual Counter | totalInsts () const override |
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| virtual Counter | totalOps () const override |
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| void | serialize (CheckpointOut &cp) const override |
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| void | unserialize (CheckpointIn &cp) override |
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| RegVal | readIntRegOperand (const StaticInst *si, int idx) override |
| | Reads an integer register. More...
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| RegVal | readFloatRegOperandBits (const StaticInst *si, int idx) override |
| | Reads a floating point register in its binary format, instead of by value. More...
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| const TheISA::VecRegContainer & | readVecRegOperand (const StaticInst *si, int idx) const override |
| | Read source vector register operand. More...
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| TheISA::VecRegContainer & | getWritableVecRegOperand (const StaticInst *si, int idx) override |
| | Read destination vector register operand for modification. More...
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| RegVal | readVecElemOperand (const StaticInst *si, int idx) const override |
| | Vector Elem Interfaces. More...
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| const TheISA::VecPredRegContainer & | readVecPredRegOperand (const StaticInst *si, int idx) const override |
| | Predicate registers interface. More...
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| TheISA::VecPredRegContainer & | getWritableVecPredRegOperand (const StaticInst *si, int idx) override |
| | Gets destination predicate register operand for modification. More...
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| RegVal | readCCRegOperand (const StaticInst *si, int idx) override |
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| void | setIntRegOperand (const StaticInst *si, int idx, RegVal val) override |
| | Sets an integer register to a value. More...
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| void | setFloatRegOperandBits (const StaticInst *si, int idx, RegVal val) override |
| | Sets the bits of a floating point register of single width to a binary value. More...
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| void | setCCRegOperand (const StaticInst *si, int idx, RegVal val) override |
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| void | setVecRegOperand (const StaticInst *si, int idx, const TheISA::VecRegContainer &val) override |
| | Sets a destination vector register operand to a value. More...
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| void | setVecElemOperand (const StaticInst *si, int idx, RegVal val) override |
| | Sets a vector register to a value. More...
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| void | setVecPredRegOperand (const StaticInst *si, int idx, const TheISA::VecPredRegContainer &val) override |
| | Sets a destination predicate register operand to a value. More...
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| bool | readPredicate () const override |
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| void | setPredicate (bool val) override |
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| bool | readMemAccPredicate () const override |
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| void | setMemAccPredicate (bool val) override |
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| uint64_t | getHtmTransactionUid () const override |
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| uint64_t | newHtmTransactionUid () const override |
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| Fault | initiateHtmCmd (Request::Flags flags) override |
| | Initiate an HTM command, e.g. More...
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| bool | inHtmTransactionalState () const override |
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| uint64_t | getHtmTransactionalDepth () const override |
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| const PCStateBase & | pcState () const override |
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| void | pcState (const PCStateBase &val) override |
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| RegVal | readMiscRegNoEffect (int misc_reg) const |
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| RegVal | readMiscReg (int misc_reg) override |
| | Reads a miscellaneous register, handling any architectural side effects due to reading that register. More...
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| void | setMiscRegNoEffect (int misc_reg, RegVal val) |
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| void | setMiscReg (int misc_reg, RegVal val) override |
| | Sets a miscellaneous register, handling any architectural side effects due to writing that register. More...
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| RegVal | readMiscRegOperand (const StaticInst *si, int idx) override |
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| void | setMiscRegOperand (const StaticInst *si, int idx, RegVal val) override |
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| void | recordPCChange (const PCStateBase &val) |
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| void | demapPage (Addr vaddr, uint64_t asn) override |
| | Invalidate a page in the DTLB and ITLB. More...
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| void | armMonitor (Addr address) override |
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| bool | mwait (PacketPtr pkt) override |
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| void | mwaitAtomic (ThreadContext *tc) override |
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| AddressMonitor * | getAddrMonitor () override |
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| RequestPtr | genMemFragmentRequest (Addr frag_addr, int size, Request::Flags flags, const std::vector< bool > &byte_enable, int &frag_size, int &size_left) const |
| | Helper function used to generate the request for a single fragment of a memory access. More...
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| Fault | readMem (Addr addr, uint8_t *data, unsigned size, Request::Flags flags, const std::vector< bool > &byte_enable) override |
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| Fault | writeMem (uint8_t *data, unsigned size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable) override |
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| Fault | amoMem (Addr addr, uint8_t *data, unsigned size, Request::Flags flags, AtomicOpFunctorPtr amo_op) override |
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| unsigned int | readStCondFailures () const override |
| | Returns the number of consecutive store conditional failures. More...
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| void | setStCondFailures (unsigned int sc_failures) override |
| | Sets the number of consecutive store conditional failures. More...
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| void | wakeup (ThreadID tid) override |
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| void | handleError () |
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| bool | checkFlags (const RequestPtr &unverified_req, Addr vAddr, Addr pAddr, int flags) |
| | Checks if the flags set by the Checker and Checkee match. More...
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| void | dumpAndExit () |
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| ThreadContext * | tcBase () const override |
| | Returns a pointer to the ThreadContext. More...
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| SimpleThread * | threadBase () |
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| virtual Fault | readMem (Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable) |
| | Perform an atomic memory read operation. More...
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| virtual Fault | initiateMemRead (Addr addr, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable) |
| | Initiate a timing memory read operation. More...
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| virtual Fault | writeMem (uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable)=0 |
| | For atomic-mode contexts, perform an atomic memory write operation. More...
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| virtual Fault | amoMem (Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op) |
| | For atomic-mode contexts, perform an atomic AMO (a.k.a., Atomic Read-Modify-Write Memory Operation) More...
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| virtual Fault | initiateMemAMO (Addr addr, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op) |
| | For timing-mode contexts, initiate an atomic AMO (atomic read-modify-write memory operation) More...
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template<class DynInstPtr>
class gem5::Checker< DynInstPtr >
Templated Checker class.
This Checker class is templated on the DynInstPtr of the instruction type that will be verified. Proper template instantiations of the Checker must be placed at the bottom of checker/cpu.cc.
Definition at line 531 of file cpu.hh.