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| | BranchSplit (const char *mnem, ExtMachInst _machInst, OpClass __opClass) |
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| | BranchDisp (const char *mnem, ExtMachInst _machInst, OpClass __opClass, int32_t _disp) |
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| std::string | generateDisassembly (Addr pc, const loader::SymbolTable *symtab) const override |
| | Internal function to generate disassembly string. More...
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| | SparcStaticInst (const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass) |
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| | SparcStaticInst (const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass) |
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| std::string | generateDisassembly (Addr pc, const loader::SymbolTable *symtab) const override |
| | Internal function to generate disassembly string. More...
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| void | printSrcReg (std::ostream &os, int reg) const |
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| void | printDestReg (std::ostream &os, int reg) const |
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| void | printRegArray (std::ostream &os, const RegId *indexArray, int num) const |
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| void | advancePC (PCStateBase &pcState) const override |
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| void | advancePC (ThreadContext *tc) const override |
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| size_t | asBytes (void *buf, size_t size) override |
| | Instruction classes can override this function to return a a representation of themselves as a blob of bytes, generally assumed to be that instructions ExtMachInst. More...
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| std::unique_ptr< PCStateBase > | buildRetPC (const PCStateBase &cur_pc, const PCStateBase &call_pc) const override |
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| void | setRegIdxArrays (RegIdArrayPtr src, RegIdArrayPtr dest) |
| | Set the pointers which point to the arrays of source and destination register indices. More...
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| | StaticInst (const char *_mnemonic, OpClass op_class) |
| | Constructor. More...
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| template<typename T > |
| size_t | simpleAsBytes (void *buf, size_t max_size, const T &t) |
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| using | RegIdArrayPtr = RegId(StaticInst::*)[] |
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| int8_t | numSrcRegs () const |
| | Number of source registers. More...
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| int8_t | numDestRegs () const |
| | Number of destination registers. More...
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| int8_t | numFPDestRegs () const |
| | Number of floating-point destination regs. More...
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| int8_t | numIntDestRegs () const |
| | Number of integer destination regs. More...
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| int8_t | numVecDestRegs () const |
| | Number of vector destination regs. More...
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| int8_t | numVecElemDestRegs () const |
| | Number of vector element destination regs. More...
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| int8_t | numVecPredDestRegs () const |
| | Number of predicate destination regs. More...
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| int8_t | numCCDestRegs () const |
| | Number of coprocesor destination regs. More...
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| bool | isNop () const |
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| bool | isMemRef () const |
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| bool | isLoad () const |
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| bool | isStore () const |
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| bool | isAtomic () const |
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| bool | isStoreConditional () const |
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| bool | isInstPrefetch () const |
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| bool | isDataPrefetch () const |
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| bool | isPrefetch () const |
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| bool | isInteger () const |
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| bool | isFloating () const |
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| bool | isVector () const |
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| bool | isControl () const |
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| bool | isCall () const |
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| bool | isReturn () const |
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| bool | isDirectCtrl () const |
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| bool | isIndirectCtrl () const |
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| bool | isCondCtrl () const |
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| bool | isUncondCtrl () const |
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| bool | isSerializing () const |
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| bool | isSerializeBefore () const |
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| bool | isSerializeAfter () const |
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| bool | isSquashAfter () const |
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| bool | isFullMemBarrier () const |
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| bool | isReadBarrier () const |
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| bool | isWriteBarrier () const |
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| bool | isNonSpeculative () const |
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| bool | isQuiesce () const |
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| bool | isUnverifiable () const |
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| bool | isSyscall () const |
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| bool | isMacroop () const |
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| bool | isMicroop () const |
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| bool | isDelayedCommit () const |
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| bool | isLastMicroop () const |
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| bool | isFirstMicroop () const |
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| bool | isHtmStart () const |
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| bool | isHtmStop () const |
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| bool | isHtmCancel () const |
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| bool | isHtmCmd () const |
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| void | setFirstMicroop () |
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| void | setLastMicroop () |
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| void | setDelayedCommit () |
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| void | setFlag (Flags f) |
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| OpClass | opClass () const |
| | Operation class. Used to select appropriate function unit in issue. More...
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| const RegId & | destRegIdx (int i) const |
| | Return logical index (architectural reg num) of i'th destination reg. More...
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| void | setDestRegIdx (int i, const RegId &val) |
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| const RegId & | srcRegIdx (int i) const |
| | Return logical index (architectural reg num) of i'th source reg. More...
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| void | setSrcRegIdx (int i, const RegId &val) |
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| virtual uint64_t | getEMI () const |
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| virtual | ~StaticInst () |
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| virtual Fault | execute (ExecContext *xc, Trace::InstRecord *traceData) const =0 |
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| virtual Fault | initiateAcc (ExecContext *xc, Trace::InstRecord *traceData) const |
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| virtual Fault | completeAcc (Packet *pkt, ExecContext *xc, Trace::InstRecord *trace_data) const |
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| virtual StaticInstPtr | fetchMicroop (MicroPC upc) const |
| | Return the microop that goes with a particular micropc. More...
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| virtual std::unique_ptr< PCStateBase > | branchTarget (const PCStateBase &pc) const |
| | Return the target address for a PC-relative branch. More...
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| virtual std::unique_ptr< PCStateBase > | branchTarget (ThreadContext *tc) const |
| | Return the target address for an indirect branch (jump). More...
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| virtual const std::string & | disassemble (Addr pc, const loader::SymbolTable *symtab=nullptr) const |
| | Return string representation of disassembled instruction. More...
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| void | printFlags (std::ostream &outs, const std::string &separator) const |
| | Print a separator separated list of this instruction's set flag names on the given stream. More...
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| std::string | getName () |
| | Return name of machine instruction. More...
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| | RefCounted () |
| | We initialize the reference count to zero and the first object to take ownership of it must increment it to one. More...
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| virtual | ~RefCounted () |
| | We make the destructor virtual because we're likely to have virtual functions on reference counted objects. More...
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| void | incref () const |
| | Increment the reference count. More...
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| void | decref () const |
| | Decrement the reference count and destroy the object if all references are gone. More...
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| static StaticInstPtr | nullStaticInstPtr |
| | Pointer to a statically allocated "null" instruction object. More...
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| static void | printMnemonic (std::ostream &os, const char *mnemonic) |
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| static void | printReg (std::ostream &os, RegId reg) |
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| static bool | passesFpCondition (uint32_t fcc, uint32_t condition) |
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| static bool | passesCondition (uint32_t codes, uint32_t condition) |
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| int32_t | disp |
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| ExtMachInst | machInst |
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| std::bitset< Num_Flags > | flags |
| | Flag values for this instruction. More...
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| OpClass | _opClass |
| | See opClass(). More...
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| int8_t | _numSrcRegs = 0 |
| | See numSrcRegs(). More...
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| int8_t | _numDestRegs = 0 |
| | See numDestRegs(). More...
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| int8_t | _numFPDestRegs = 0 |
| | The following are used to track physical register usage for machines with separate int & FP reg files. More...
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| int8_t | _numIntDestRegs = 0 |
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| int8_t | _numCCDestRegs = 0 |
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| int8_t | _numVecDestRegs = 0 |
| | To use in architectures with vector register file. More...
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| int8_t | _numVecElemDestRegs = 0 |
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| int8_t | _numVecPredDestRegs = 0 |
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| const char * | mnemonic |
| | Base mnemonic (e.g., "add"). More...
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| std::unique_ptr< std::string > | cachedDisassembly |
| | String representation of disassembly (lazily evaluated via disassemble()). More...
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Base class for 16bit split displacements.
Definition at line 90 of file branch.hh.