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gem5
v21.2.1.1
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TarmacTracer Record: Record generated by the TarmacTracer for every executed instruction. More...
#include <tarmac_record.hh>
Classes | |
| struct | TraceInstEntry |
| Instruction Entry. More... | |
| struct | TraceMemEntry |
| Memory Entry. More... | |
| struct | TraceRegEntry |
| Register Entry. More... | |
Public Types | |
| using | InstPtr = std::unique_ptr< TraceInstEntry > |
| using | MemPtr = std::unique_ptr< TraceMemEntry > |
| using | RegPtr = std::unique_ptr< TraceRegEntry > |
Public Types inherited from gem5::Trace::TarmacBaseRecord | |
| enum | TarmacRecordType { TARMAC_INST, TARMAC_REG, TARMAC_MEM, TARMAC_UNSUPPORTED } |
| TARMAC trace record type. More... | |
| enum | ISetState { ISET_ARM, ISET_THUMB, ISET_A64, ISET_UNSUPPORTED } |
| ARM instruction set state. More... | |
| enum | RegType { REG_R, REG_X, REG_S, REG_D, REG_P, REG_Q, REG_Z, REG_MISC } |
| ARM register type. More... | |
Public Member Functions | |
| TarmacTracerRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, TarmacTracer &_tracer, const StaticInstPtr _macroStaticInst=NULL) | |
| virtual void | dump () override |
Public Member Functions inherited from gem5::Trace::TarmacBaseRecord | |
| TarmacBaseRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, const StaticInstPtr _macroStaticInst=nullptr) | |
Public Member Functions inherited from gem5::Trace::InstRecord | |
| InstRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, const StaticInstPtr _macroStaticInst=nullptr) | |
| virtual | ~InstRecord () |
| void | setWhen (Tick new_when) |
| void | setMem (Addr a, Addr s, unsigned f) |
| template<typename T , size_t N> | |
| void | setData (std::array< T, N > d) |
| void | setData (uint64_t d) |
| void | setData (uint32_t d) |
| void | setData (uint16_t d) |
| void | setData (uint8_t d) |
| void | setData (int64_t d) |
| void | setData (int32_t d) |
| void | setData (int16_t d) |
| void | setData (int8_t d) |
| void | setData (double d) |
| void | setData (TheISA::VecRegContainer &d) |
| void | setData (TheISA::VecPredRegContainer &d) |
| void | setFetchSeq (InstSeqNum seq) |
| void | setCPSeq (InstSeqNum seq) |
| void | setPredicate (bool val) |
| void | setFaulting (bool val) |
| Tick | getWhen () const |
| ThreadContext * | getThread () const |
| StaticInstPtr | getStaticInst () const |
| const PCStateBase & | getPCState () const |
| StaticInstPtr | getMacroStaticInst () const |
| Addr | getAddr () const |
| Addr | getSize () const |
| unsigned | getFlags () const |
| bool | getMemValid () const |
| uint64_t | getIntData () const |
| double | getFloatData () const |
| int | getDataStatus () const |
| InstSeqNum | getFetchSeq () const |
| bool | getFetchSeqValid () const |
| InstSeqNum | getCpSeq () const |
| bool | getCpSeqValid () const |
| bool | getFaulting () const |
Protected Member Functions | |
| virtual void | addInstEntry (std::vector< InstPtr > &queue, const TarmacContext &ptr) |
| Generates an Entry for the executed instruction. More... | |
| virtual void | addMemEntry (std::vector< MemPtr > &queue, const TarmacContext &ptr) |
| Generates an Entry for every triggered memory access. More... | |
| virtual void | addRegEntry (std::vector< RegPtr > &queue, const TarmacContext &ptr) |
| Generate an Entry for every register being written. More... | |
| template<typename RegEntry > | |
| RegEntry | genRegister (const TarmacContext &tarmCtx, const RegId ®) |
| Generate and update a register entry. More... | |
| template<typename RegEntry > | |
| void | mergeCCEntry (std::vector< RegPtr > &queue, const TarmacContext &tarmCtx) |
| template<typename Queue > | |
| void | flushQueues (Queue &queue) |
| Flush queues to the trace output. More... | |
| template<typename Queue , typename... Args> | |
| void | flushQueues (Queue &queue, Args &... args) |
Protected Attributes | |
| TarmacTracer & | tracer |
| Reference to tracer. More... | |
Protected Attributes inherited from gem5::Trace::InstRecord | |
| Tick | when |
| ThreadContext * | thread |
| StaticInstPtr | staticInst |
| std::unique_ptr< PCStateBase > | pc |
| StaticInstPtr | macroStaticInst |
| Addr | addr |
| The address that was accessed. More... | |
| Addr | size |
| The size of the memory request. More... | |
| unsigned | flags |
| The flags that were assigned to the request. More... | |
| union { | |
| uint64_t as_int | |
| double as_double | |
| TheISA::VecRegContainer * as_vec | |
| TheISA::VecPredRegContainer * as_pred | |
| } | data |
| InstSeqNum | fetch_seq |
| InstSeqNum | cp_seq |
| enum gem5::Trace::InstRecord::DataStatus | data_status |
| bool | mem_valid |
| bool | fetch_seq_valid |
| bool | cp_seq_valid |
| bool | predicate |
| is the predicate for execution this inst true or false (not execed)? More... | |
| bool | faulting |
| Did the execution of this instruction fault? (requires ExecFaulting to be enabled) More... | |
Additional Inherited Members | |
Static Public Member Functions inherited from gem5::Trace::TarmacBaseRecord | |
| static ISetState | pcToISetState (const PCStateBase &pc) |
| Returns the Instruction Set State according to the current PCState. More... | |
Protected Types inherited from gem5::Trace::InstRecord | |
| enum | DataStatus { DataInvalid = 0, DataInt8 = 1, DataInt16 = 2, DataInt32 = 4, DataInt64 = 8, DataDouble = 3, DataVec = 5, DataVecPred = 6 } |
TarmacTracer Record: Record generated by the TarmacTracer for every executed instruction.
The record is composed by a set of entries, matching the tracing capabilities provided by the Tarmac specifications:
Definition at line 94 of file tarmac_record.hh.
| using gem5::Trace::TarmacTracerRecord::InstPtr = std::unique_ptr<TraceInstEntry> |
Definition at line 196 of file tarmac_record.hh.
| using gem5::Trace::TarmacTracerRecord::MemPtr = std::unique_ptr<TraceMemEntry> |
Definition at line 197 of file tarmac_record.hh.
| using gem5::Trace::TarmacTracerRecord::RegPtr = std::unique_ptr<TraceRegEntry> |
Definition at line 198 of file tarmac_record.hh.
| gem5::Trace::TarmacTracerRecord::TarmacTracerRecord | ( | Tick | _when, |
| ThreadContext * | _thread, | ||
| const StaticInstPtr | _staticInst, | ||
| const PCStateBase & | _pc, | ||
| TarmacTracer & | _tracer, | ||
| const StaticInstPtr | _macroStaticInst = NULL |
||
| ) |
Definition at line 112 of file tarmac_record.cc.
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protectedvirtual |
Generates an Entry for the executed instruction.
Reimplemented in gem5::Trace::TarmacTracerRecordV8.
Definition at line 293 of file tarmac_record.cc.
References gem5::Trace::InstRecord::predicate.
Referenced by dump().
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protectedvirtual |
Generates an Entry for every triggered memory access.
Reimplemented in gem5::Trace::TarmacTracerRecordV8.
Definition at line 304 of file tarmac_record.cc.
References gem5::Trace::InstRecord::getAddr(), gem5::Trace::InstRecord::getIntData(), gem5::Trace::InstRecord::getMemValid(), and gem5::Trace::InstRecord::getSize().
Referenced by dump().
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protectedvirtual |
Generate an Entry for every register being written.
Reimplemented in gem5::Trace::TarmacTracerRecordV8.
Definition at line 320 of file tarmac_record.cc.
References gem5::StaticInst::destRegIdx(), gem5::StaticInst::numDestRegs(), gem5::X86ISA::reg, and gem5::Trace::InstRecord::staticInst.
Referenced by dump().
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overridevirtual |
Implements gem5::Trace::TarmacBaseRecord.
Definition at line 344 of file tarmac_record.cc.
References addInstEntry(), addMemEntry(), addRegEntry(), flushQueues(), gem5::Trace::TarmacTracer::instQueue, gem5::StaticInst::isFirstMicroop(), gem5::StaticInst::isLastMicroop(), gem5::StaticInst::isMicroop(), gem5::Trace::InstRecord::macroStaticInst, gem5::Trace::TarmacTracer::memQueue, gem5::Trace::InstRecord::pc, gem5::Trace::TarmacTracer::regQueue, gem5::Trace::InstRecord::staticInst, gem5::Trace::InstRecord::thread, and tracer.
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protected |
Flush queues to the trace output.
Definition at line 392 of file tarmac_record.cc.
References gem5::Trace::output().
Referenced by dump(), and flushQueues().
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protected |
Definition at line 405 of file tarmac_record.cc.
References flushQueues().
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inlineprotected |
Generate and update a register entry.
Definition at line 217 of file tarmac_record.hh.
References gem5::X86ISA::reg.
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inlineprotected |
Definition at line 227 of file tarmac_record.hh.
References gem5::ArmISA::MISCREG_CPSR, gem5::MiscRegClass, and gem5::X86ISA::reg.
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protected |