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gem5
v21.2.1.1
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#include <uart8250.hh>
Classes | |
| class | Registers |
Public Types | |
| using | Params = Uart8250Params |
Public Types inherited from gem5::Uart | |
| using | Params = UartParams |
Public Types inherited from gem5::PioDevice | |
| using | Params = PioDeviceParams |
Public Types inherited from gem5::ClockedObject | |
| using | Params = ClockedObjectParams |
| Parameters of ClockedObject. More... | |
Public Types inherited from gem5::SimObject | |
| typedef SimObjectParams | Params |
Public Member Functions | |
| Uart8250 (const Params &p) | |
| Tick | read (PacketPtr pkt) override |
| Pure virtual function that the device must implement. More... | |
| Tick | write (PacketPtr pkt) override |
| Pure virtual function that the device must implement. More... | |
| AddrRangeList | getAddrRanges () const override |
| Determine the address ranges that this device responds to. More... | |
| void | dataAvailable () override |
| Inform the uart that there is data available. More... | |
| virtual bool | intStatus () |
| Return if we have an interrupt pending. More... | |
| void | serialize (CheckpointOut &cp) const override |
| Serialize an object. More... | |
| void | unserialize (CheckpointIn &cp) override |
| Unserialize an object. More... | |
Public Member Functions inherited from gem5::Uart | |
| Uart (const Params &p, Addr pio_size) | |
| bool | intStatus () |
| Return if we have an interrupt pending. More... | |
Public Member Functions inherited from gem5::BasicPioDevice | |
| PARAMS (BasicPioDevice) | |
| BasicPioDevice (const Params &p, Addr size) | |
Public Member Functions inherited from gem5::PioDevice | |
| PioDevice (const Params &p) | |
| virtual | ~PioDevice () |
| void | init () override |
| init() is called after all C++ SimObjects have been created and all ports are connected. More... | |
| Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
| Get a port with a given name and index. More... | |
Public Member Functions inherited from gem5::ClockedObject | |
| ClockedObject (const ClockedObjectParams &p) | |
| void | serialize (CheckpointOut &cp) const override |
| Serialize an object. More... | |
| void | unserialize (CheckpointIn &cp) override |
| Unserialize an object. More... | |
Public Member Functions inherited from gem5::SimObject | |
| const Params & | params () const |
| SimObject (const Params &p) | |
| virtual | ~SimObject () |
| virtual void | loadState (CheckpointIn &cp) |
| loadState() is called on each SimObject when restoring from a checkpoint. More... | |
| virtual void | initState () |
| initState() is called on each SimObject when not restoring from a checkpoint. More... | |
| virtual void | regProbePoints () |
| Register probe points for this object. More... | |
| virtual void | regProbeListeners () |
| Register probe listeners for this object. More... | |
| ProbeManager * | getProbeManager () |
| Get the probe manager for this object. More... | |
| virtual void | startup () |
| startup() is the final initialization call before simulation. More... | |
| DrainState | drain () override |
| Provide a default implementation of the drain interface for objects that don't need draining. More... | |
| virtual void | memWriteback () |
| Write back dirty buffers to memory using functional writes. More... | |
| virtual void | memInvalidate () |
| Invalidate the contents of memory buffers. More... | |
| void | serialize (CheckpointOut &cp) const override |
| Serialize an object. More... | |
| void | unserialize (CheckpointIn &cp) override |
| Unserialize an object. More... | |
Public Member Functions inherited from gem5::EventManager | |
| EventQueue * | eventQueue () const |
| void | schedule (Event &event, Tick when) |
| void | deschedule (Event &event) |
| void | reschedule (Event &event, Tick when, bool always=false) |
| void | schedule (Event *event, Tick when) |
| void | deschedule (Event *event) |
| void | reschedule (Event *event, Tick when, bool always=false) |
| void | wakeupEventQueue (Tick when=(Tick) -1) |
| This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More... | |
| void | setCurTick (Tick newVal) |
| EventManager (EventManager &em) | |
| Event manger manages events in the event queue. More... | |
| EventManager (EventManager *em) | |
| EventManager (EventQueue *eq) | |
Public Member Functions inherited from gem5::Serializable | |
| Serializable () | |
| virtual | ~Serializable () |
| void | serializeSection (CheckpointOut &cp, const char *name) const |
| Serialize an object into a new section. More... | |
| void | serializeSection (CheckpointOut &cp, const std::string &name) const |
| void | unserializeSection (CheckpointIn &cp, const char *name) |
| Unserialize an a child object. More... | |
| void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Member Functions inherited from gem5::Drainable | |
| DrainState | drainState () const |
| Return the current drain state of an object. More... | |
| virtual void | notifyFork () |
| Notify a child process of a fork. More... | |
Public Member Functions inherited from gem5::statistics::Group | |
| Group (Group *parent, const char *name=nullptr) | |
| Construct a new statistics group. More... | |
| virtual | ~Group () |
| virtual void | regStats () |
| Callback to set stat parameters. More... | |
| virtual void | resetStats () |
| Callback to reset stats. More... | |
| virtual void | preDumpStats () |
| Callback before stats are dumped. More... | |
| void | addStat (statistics::Info *info) |
| Register a stat with this group. More... | |
| const std::map< std::string, Group * > & | getStatGroups () const |
| Get all child groups associated with this object. More... | |
| const std::vector< Info * > & | getStats () const |
| Get all stats associated with this object. More... | |
| void | addStatGroup (const char *name, Group *block) |
| Add a stat block as a child of this block. More... | |
| const Info * | resolveStat (std::string name) const |
| Resolve a stat by its name within this group. More... | |
| void | mergeStatGroup (Group *block) |
| Merge the contents (stats & children) of a block to this block. More... | |
| Group ()=delete | |
| Group (const Group &)=delete | |
| Group & | operator= (const Group &)=delete |
Public Member Functions inherited from gem5::Named | |
| Named (const std::string &name_) | |
| virtual | ~Named ()=default |
| virtual std::string | name () const |
Public Member Functions inherited from gem5::Clocked | |
| void | updateClockPeriod () |
| Update the tick to the current tick. More... | |
| Tick | clockEdge (Cycles cycles=Cycles(0)) const |
| Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More... | |
| Cycles | curCycle () const |
| Determine the current cycle, corresponding to a tick aligned to a clock edge. More... | |
| Tick | nextCycle () const |
| Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More... | |
| uint64_t | frequency () const |
| Tick | clockPeriod () const |
| double | voltage () const |
| Cycles | ticksToCycles (Tick t) const |
| Tick | cyclesToTicks (Cycles c) const |
Protected Types | |
| using | Register8 = Registers::Register8 |
| template<class T > | |
| using | Register = Registers::Register< T > |
Protected Member Functions | |
| BitUnion8 (Ier) Bitfield< 0 > rdi | |
| EndBitUnion (Ier) BitUnion8(Iir) Bitfield< 0 > pending | |
| EndBitUnion (Iir) BitUnion8(Lcr) Bitfield< 1 | |
| EndBitUnion (Lcr) BitUnion8(Lsr) Bitfield< 0 > rdr | |
| EndBitUnion (Lsr) enum class InterruptIds | |
| uint8_t | readRbr (Register8 ®) |
| void | writeThr (Register8 ®, const uint8_t &data) |
| void | writeIer (Register< Ier > ®, const Ier &ier) |
| Iir | readIir (Register< Iir > ®) |
| void | processIntrEvent (int intrBit) |
| void | scheduleIntr (Event *event) |
Protected Member Functions inherited from gem5::Drainable | |
| Drainable () | |
| virtual | ~Drainable () |
| virtual void | drainResume () |
| Resume execution after a successful drain. More... | |
| void | signalDrainDone () const |
| Signal that an object is drained. More... | |
Protected Member Functions inherited from gem5::Clocked | |
| Clocked (ClockDomain &clk_domain) | |
| Create a clocked object and set the clock domain based on the parameters. More... | |
| Clocked (Clocked &)=delete | |
| Clocked & | operator= (Clocked &)=delete |
| virtual | ~Clocked () |
| Virtual destructor due to inheritance. More... | |
| void | resetClock () const |
| Reset the object's clock using the current global tick value. More... | |
| virtual void | clockPeriodUpdated () |
| A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More... | |
Protected Attributes | |
| Bitfield< 1 > | thri |
| Bitfield< 2 > | rlsi |
| Bitfield< 3 > | msi |
| Bitfield< 2, 1 > | id |
| Bitfield< 7, 3 > | zeroes |
| wordSize | |
| Bitfield< 2 > | stopBits |
| Bitfield< 5, 3 > | parity |
| Bitfield< 6 > | breakCont |
| Bitfield< 7 > | dlab |
| Bitfield< 1 > | overrunError |
| Bitfield< 2 > | parityError |
| Bitfield< 3 > | framingError |
| Bitfield< 4 > | breakCond |
| Bitfield< 5 > | tbe |
| Bitfield< 6 > | txEmpty |
| Bitfield< 7 > | unused |
| Registers | registers |
| Tick | lastTxInt |
| EventFunctionWrapper | txIntrEvent |
| EventFunctionWrapper | rxIntrEvent |
Protected Attributes inherited from gem5::Uart | |
| int | status |
| Platform * | platform |
| SerialDevice * | device |
Protected Attributes inherited from gem5::BasicPioDevice | |
| Addr | pioAddr |
| Address that the device listens to. More... | |
| Addr | pioSize |
| Size that the device's address range. More... | |
| Tick | pioDelay |
| Delay that the device experinces on an access. More... | |
Protected Attributes inherited from gem5::PioDevice | |
| System * | sys |
| PioPort< PioDevice > | pioPort |
| The pioPort that handles the requests for us and provides us requests that it sees. More... | |
Protected Attributes inherited from gem5::SimObject | |
| const SimObjectParams & | _params |
| Cached copy of the object parameters. More... | |
Protected Attributes inherited from gem5::EventManager | |
| EventQueue * | eventq |
| A pointer to this object's event queue. More... | |
Additional Inherited Members | |
Static Public Member Functions inherited from gem5::SimObject | |
| static void | serializeAll (const std::string &cpt_dir) |
| Create a checkpoint by serializing all SimObjects in the system. More... | |
| static SimObject * | find (const char *name) |
| Find the SimObject with the given name and return a pointer to it. More... | |
| static void | setSimObjectResolver (SimObjectResolver *resolver) |
| There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More... | |
| static SimObjectResolver * | getSimObjectResolver () |
| There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More... | |
Static Public Member Functions inherited from gem5::Serializable | |
| static const std::string & | currentSection () |
| Gets the fully-qualified name of the active section. More... | |
| static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
| Generate a checkpoint file so that the serialization can be routed to it. More... | |
Public Attributes inherited from gem5::ClockedObject | |
| PowerState * | powerState |
Definition at line 51 of file uart8250.hh.
| using gem5::Uart8250::Params = Uart8250Params |
Definition at line 216 of file uart8250.hh.
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Definition at line 198 of file uart8250.hh.
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Definition at line 196 of file uart8250.hh.
| gem5::Uart8250::Uart8250 | ( | const Params & | p | ) |
Definition at line 88 of file uart8250.cc.
References processIntrEvent(), and gem5::TX_INT.
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Inform the uart that there is data available.
Implements gem5::Uart.
Definition at line 244 of file uart8250.cc.
References gem5::Uart8250::Registers::ier, gem5::Uart::platform, registers, gem5::RX_INT, and gem5::Uart::status.
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Definition at line 84 of file uart8250.hh.
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Determine the address ranges that this device responds to.
Reimplemented from gem5::BasicPioDevice.
Definition at line 255 of file uart8250.cc.
References gem5::BasicPioDevice::pioAddr, gem5::BasicPioDevice::pioSize, and gem5::RangeSize().
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Return if we have an interrupt pending.
Definition at line 233 of file uart8250.hh.
References gem5::Uart::status.
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Definition at line 50 of file uart8250.cc.
References gem5::curTick(), DPRINTF, gem5::Uart8250::Registers::ier, lastTxInt, gem5::Uart::platform, registers, and gem5::Uart::status.
Referenced by Uart8250().
Pure virtual function that the device must implement.
Called when a read command is recieved by the port.
| pkt | Packet describing this request |
Implements gem5::PioDevice.
Definition at line 217 of file uart8250.cc.
References DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getPtr(), gem5::Packet::getSize(), gem5::Packet::makeAtomicResponse(), gem5::BasicPioDevice::pioAddr, gem5::BasicPioDevice::pioDelay, gem5::RegisterBank< BankByteOrder >::read(), and registers.
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Definition at line 160 of file uart8250.cc.
References DPRINTF, gem5::RX_INT, gem5::Uart::status, and gem5::TX_INT.
Referenced by gem5::Uart8250::Registers::Registers().
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Definition at line 132 of file uart8250.cc.
References data, gem5::SerialDevice::dataAvailable(), gem5::Uart::device, DPRINTF, gem5::Uart8250::Registers::ier, gem5::Uart::platform, gem5::SerialDevice::readData(), registers, gem5::RX_INT, rxIntrEvent, scheduleIntr(), and gem5::Uart::status.
Referenced by gem5::Uart8250::Registers::Registers().
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Definition at line 76 of file uart8250.cc.
References gem5::curTick(), DPRINTF, gem5::MipsISA::event, gem5::sim_clock::as_int::ns, gem5::EventManager::reschedule(), and gem5::EventManager::schedule().
Referenced by readRbr(), writeIer(), and writeThr().
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Serialize an object.
Output an object's state into the current checkpoint section.
| cp | Checkpoint state |
Implements gem5::Serializable.
Definition at line 263 of file uart8250.cc.
References gem5::Uart8250::Registers::ier, gem5::Uart8250::Registers::lcr, gem5::Uart8250::Registers::mcr, gem5::paramOut(), registers, rxIntrEvent, gem5::Event::scheduled(), SERIALIZE_SCALAR, gem5::Uart::status, txIntrEvent, and gem5::Event::when().
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Unserialize an object.
Read an object's state from the current checkpoint section.
| cp | Checkpoint state |
Implements gem5::Serializable.
Definition at line 284 of file uart8250.cc.
References gem5::Uart8250::Registers::ier, gem5::Uart8250::Registers::lcr, gem5::Uart8250::Registers::mcr, gem5::paramIn(), registers, rxIntrEvent, gem5::EventManager::schedule(), gem5::Uart::status, txIntrEvent, and UNSERIALIZE_SCALAR.
Pure virtual function that the device must implement.
Called when a write command is recieved by the port.
| pkt | Packet describing this request |
Implements gem5::PioDevice.
Definition at line 230 of file uart8250.cc.
References DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getPtr(), gem5::Packet::getRaw(), gem5::Packet::getSize(), gem5::Packet::makeAtomicResponse(), gem5::BasicPioDevice::pioAddr, gem5::BasicPioDevice::pioDelay, registers, and gem5::RegisterBank< BankByteOrder >::write().
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Definition at line 179 of file uart8250.cc.
References gem5::curTick(), gem5::SerialDevice::dataAvailable(), gem5::EventManager::deschedule(), gem5::Uart::device, DPRINTF, lastTxInt, gem5::sim_clock::as_int::ns, gem5::Uart::platform, gem5::EventFunctionWrapper::process(), gem5::X86ISA::reg, gem5::RX_INT, rxIntrEvent, gem5::Event::scheduled(), scheduleIntr(), gem5::Uart::status, gem5::TX_INT, and txIntrEvent.
Referenced by gem5::Uart8250::Registers::Registers().
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Definition at line 150 of file uart8250.cc.
References data, gem5::Uart::device, gem5::Uart8250::Registers::ier, gem5::Uart::platform, registers, scheduleIntr(), gem5::Uart::status, gem5::TX_INT, txIntrEvent, and gem5::SerialDevice::writeData().
Referenced by gem5::Uart8250::Registers::Registers().
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Definition at line 80 of file uart8250.hh.
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Definition at line 71 of file uart8250.hh.
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Definition at line 72 of file uart8250.hh.
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Definition at line 79 of file uart8250.hh.
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Definition at line 63 of file uart8250.hh.
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Definition at line 207 of file uart8250.hh.
Referenced by processIntrEvent(), and writeIer().
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Definition at line 58 of file uart8250.hh.
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Definition at line 77 of file uart8250.hh.
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Definition at line 70 of file uart8250.hh.
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Definition at line 78 of file uart8250.hh.
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Definition at line 200 of file uart8250.hh.
Referenced by dataAvailable(), processIntrEvent(), read(), readRbr(), serialize(), unserialize(), write(), and writeThr().
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Definition at line 57 of file uart8250.hh.
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Definition at line 213 of file uart8250.hh.
Referenced by readRbr(), serialize(), unserialize(), and writeIer().
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Definition at line 69 of file uart8250.hh.
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Definition at line 81 of file uart8250.hh.
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Definition at line 56 of file uart8250.hh.
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Definition at line 82 of file uart8250.hh.
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Definition at line 212 of file uart8250.hh.
Referenced by serialize(), unserialize(), writeIer(), and writeThr().
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Definition at line 83 of file uart8250.hh.
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Definition at line 68 of file uart8250.hh.
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Definition at line 64 of file uart8250.hh.