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31 #include "debug/HWPrefetch.hh"
33 #include "params/STeMSPrefetcher.hh"
43 :
Queued(
p), spatialRegionSize(
p.spatial_region_size),
44 spatialRegionSizeBits(
floorLog2(
p.spatial_region_size)),
45 reconstructionEntries(
p.reconstruction_entries),
46 activeGenerationTable(
p.active_generation_table_assoc,
47 p.active_generation_table_entries,
48 p.active_generation_table_indexing_policy,
49 p.active_generation_table_replacement_policy,
51 spatialRegionSize / blkSize)),
52 patternSequenceTable(
p.pattern_sequence_table_assoc,
53 p.pattern_sequence_table_entries,
54 p.pattern_sequence_table_indexing_policy,
55 p.pattern_sequence_table_replacement_policy,
57 spatialRegionSize / blkSize)),
58 rmob(
p.region_miss_order_buffer_entries)
61 "The spatial region size must be a power of 2.");
73 if (agt_entry.isValid()) {
74 bool generation_ended =
false;
75 bool sr_is_secure = agt_entry.isSecure();
76 for (
auto &seq_entry : agt_entry.sequence) {
77 if (seq_entry.counter > 0) {
79 agt_entry.paddress + seq_entry.offset *
blkSize;
80 if (!
inCache(cache_addr, sr_is_secure) &&
82 generation_ended =
true;
87 if (generation_ended) {
92 if (pst_entry ==
nullptr) {
95 assert(pst_entry !=
nullptr);
103 pst_entry->
update(agt_entry);
117 rmob_entry.
delta = delta;
119 rmob.push_back(rmob_entry);
127 DPRINTF(HWPrefetch,
"Ignoring request with no PC.\n");
145 if (agt_entry !=
nullptr) {
162 assert(agt_entry !=
nullptr);
170 if (agt_e.isValid() && agt_entry != &agt_e) {
171 agt_e.seqCounter += 1;
178 auto it =
rmob.end();
179 while (it !=
rmob.begin()) {
181 if (it->srAddress == sr_addr) {
196 unsigned int idx = 0;
203 idx += (it+1)->delta + 1;
212 if (pst_entry !=
nullptr) {
214 for (
auto &seq_entry : pst_entry->
sequence) {
215 if (seq_entry.counter > 1) {
220 unsigned ridx = idx + seq_entry.delta;
224 reconstruction[ridx] ==
MaxAddr) {
225 reconstruction[ridx] = rec_addr;
227 reconstruction[ridx + 1] ==
MaxAddr) {
228 reconstruction[ridx + 1] = rec_addr;
230 reconstruction[ridx + 2] ==
MaxAddr) {
231 reconstruction[ridx + 2] = rec_addr;
232 }
else if ((ridx > 0) &&
234 reconstruction[ridx - 1] ==
MaxAddr) {
235 reconstruction[ridx - 1] = rec_addr;
236 }
else if ((ridx > 1) &&
238 reconstruction[ridx - 2] ==
MaxAddr) {
239 reconstruction[ridx - 2] = rec_addr;
244 idx += (it+1)->delta + 1;
247 for (
Addr pf_addr : reconstruction) {
Addr getAddr() const
Obtains the address value of this Prefetcher address.
void checkForActiveGenerationsEnd()
Checks if the active generations have ended.
Entry data type for the Active Generation Table (AGT) and the Pattern Sequence Table (PST)
std::pair< Addr, int32_t > AddrPriority
bool isSecure() const
Returns true if the address targets the secure memory space.
const size_t spatialRegionSize
Size of each spatial region.
void calculatePrefetch(const PrefetchInfo &pfi, std::vector< AddrPriority > &addresses) override
void reconstructSequence(CircularQueue< RegionMissOrderBufferEntry >::iterator rmob_it, std::vector< AddrPriority > &addresses)
Reconstructs a sequence of accesses and generates the prefetch addresses, adding them to the addresse...
Addr srAddress
Address of the spatial region.
Addr paddress
Physical address of the spatial region.
unsigned int delta
Delta within the global miss order sequence.
static constexpr std::enable_if_t< std::is_integral_v< T >, int > floorLog2(T x)
bool inMissQueue(Addr addr, bool is_secure) const
Determine if address is in cache miss queue.
bool isCacheMiss() const
Check if this event comes from a cache miss.
Addr getPaddr() const
Gets the physical address of the request.
static constexpr bool isPowerOf2(const T &n)
void addToRMOB(Addr sr_addr, Addr pst_addr, unsigned int delta)
Adds an entry to the RMOB.
Addr pc
PC that started this generation.
Addr getPC() const
Returns the program counter that generated this request.
Iterator to the circular queue.
Addr pstAddress
Address used to index the PST table, generated using the PC and the offset within the spatial region.
const size_t spatialRegionSizeBits
log_2 of the spatial region size
void addOffset(unsigned int offset)
Add a new access to the sequence.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
void update(ActiveGenerationTableEntry const &e)
Update the entry data with an entry from a generation that just ended.
GEM5_DEPRECATED_NAMESPACE(GuestABI, guest_abi)
STeMS(const STeMSPrefetcherParams &p)
CircularQueue< RegionMissOrderBufferEntry > rmob
Region Miss Order Buffer (RMOB)
AssociativeSet< ActiveGenerationTableEntry > activeGenerationTable
Active Generation Table (AGT)
const unsigned int reconstructionEntries
Number of reconstruction entries.
AssociativeSet< ActiveGenerationTableEntry > patternSequenceTable
Pattern Sequence Table (PST)
unsigned blkSize
The block size of the parent cache.
unsigned int lastTriggerCounter
Counter to keep the count of accesses between trigger accesses.
bool inCache(Addr addr, bool is_secure) const
Determine if address is in cache.
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
std::vector< SequenceEntry > sequence
Sequence of accesses.
Data type of the Region Miss Order Buffer entry.
Class containing the information needed by the prefetch to train and generate new prefetch requests.
bool hasPC() const
Returns true if the associated program counter is valid.
Generated on Wed May 4 2022 12:13:59 for gem5 by doxygen 1.8.17