gem5  v22.0.0.2
pagetable_walker.cc
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1 /*
2  * Copyright (c) 2021 Advanced Micro Devices, Inc.
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29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
33 
34 #include <memory>
35 
37 #include "mem/abstract_mem.hh"
38 #include "mem/packet_access.hh"
39 
40 namespace gem5
41 {
42 namespace VegaISA
43 {
44 
45 /*
46  * Functional/atomic mode methods
47  */
48 Fault
49 Walker::startFunctional(Addr base, Addr &addr, unsigned &logBytes,
50  BaseMMU::Mode mode, bool &isSystem)
51 {
52  PageTableEntry pte;
53  Addr vaddr = addr;
54  Fault fault = startFunctional(base, vaddr, pte, logBytes, mode);
55  isSystem = pte.s;
56  addr = ((pte.ppn << PageShift) & ~mask(logBytes))
57  | (vaddr & mask(logBytes));
58 
59  return fault;
60 }
61 
62 Fault
64  unsigned &logBytes, BaseMMU::Mode mode)
65 {
66  DPRINTF(GPUPTWalker, "Vega walker walker: %p funcState: %p "
67  "funcState->walker %p\n",
68  this, &funcState, funcState.getWalker());
70  return funcState.startFunctional(base, vaddr, pte, logBytes);
71 }
72 
73 Fault
75  PageTableEntry &pte, unsigned &logBytes)
76 {
77  Fault fault = NoFault;
78  DPRINTF(GPUPTWalker, "Vega walker starting with addr: %#lx "
79  "logical: %#lx\n", vaddr, vaddr >> PageShift);
80 
81  assert(!started);
82  started = true;
83 
84  do {
85  DPRINTF(GPUPTWalker, "Sending functional read to %#lx\n",
86  read->getAddr());
87 
88  auto devmem = walker->system->getDeviceMemory(read);
89  assert(devmem);
90  devmem->access(read);
91 
92  fault = stepWalk();
93  assert(fault == NoFault || read == NULL);
94 
95  state = nextState;
96  } while (read);
97 
98  logBytes = entry.logBytes;
99  pte = entry.pte;
100 
101  return fault;
102 }
103 
104 
105 /*
106  * Timing mode methods
107  */
108 void
110 {
111  DPRINTF(GPUPTWalker, "Vega walker starting with addr: %#lx "
112  "logical: %#lx\n", vaddr, vaddr >> PageShift);
113 
114  WalkerState *newState = new WalkerState(this, pkt);
115 
116  newState->initState(mode, base, vaddr);
117  currStates.push_back(newState);
118  DPRINTF(GPUPTWalker, "There are %ld walker states\n", currStates.size());
119 
120  newState->startWalk();
121 }
122 
123 void
125  bool is_functional)
126 {
127  DPRINTF(GPUPTWalker, "Walker::WalkerState::initState\n");
128  DPRINTF(GPUPTWalker, "Walker::WalkerState::initState %p\n", this);
129  DPRINTF(GPUPTWalker, "Walker::WalkerState::initState %d\n", state);
130  assert(state == Ready);
131 
132  started = false;
133  mode = _mode;
134  timing = !is_functional;
135  enableNX = true;
136  dataSize = 8; // 64-bit PDEs / PTEs
137  nextState = PDE2;
138 
139  DPRINTF(GPUPTWalker, "Setup walk with base %#lx\n", baseAddr);
140 
141  // First level in Vega is PDE2. Calculate the address for that PDE using
142  // baseAddr and vaddr.
143  state = PDE2;
144  Addr logical_addr = vaddr >> PageShift;
145  Addr pde2Addr = (((baseAddr >> 6) << 3) + (logical_addr >> 3*9)) << 3;
146  DPRINTF(GPUPTWalker, "Walk PDE2 address is %#lx\n", pde2Addr);
147 
148  // Start populating the VegaTlbEntry response
149  entry.vaddr = logical_addr;
150 
151  // Prepare the read packet that will be used at each level
153 
154  RequestPtr request = std::make_shared<Request>(
155  pde2Addr, dataSize, flags, walker->deviceRequestorId);
156 
157  read = new Packet(request, MemCmd::ReadReq);
158  read->allocate();
159 }
160 
161 void
163 {
164  if (!started) {
165  // Read the first PDE to begin
166  DPRINTF(GPUPTWalker, "Sending timing read to %#lx\n",
167  read->getAddr());
168 
169  sendPackets();
170  started = true;
171  } else {
172  // This is mostly the same as stepWalk except we update the state and
173  // send the new timing read request.
174  timingFault = stepWalk();
175  assert(timingFault == NoFault || read == NULL);
176 
177  state = nextState;
178 
179  if (read) {
180  DPRINTF(GPUPTWalker, "Sending timing read to %#lx\n",
181  read->getAddr());
182  sendPackets();
183  } else {
184  // Set physical page address in entry
185  entry.paddr = bits(entry.pte, 47, entry.logBytes);
186  entry.paddr <<= entry.logBytes;
187 
188  // Insert to TLB
189  assert(walker);
190  assert(walker->tlb);
191  walker->tlb->insert(entry.vaddr, entry);
192 
193  // Send translation return event
194  walker->walkerResponse(this, entry, tlbPkt);
195  }
196  }
197 }
198 
199 Fault
201 {
202  assert(state != Ready && state != Waiting && read);
203  Fault fault = NoFault;
204  PageTableEntry pte = read->getLE<uint64_t>();
205 
206  bool uncacheable = !pte.c;
207  Addr nextRead = 0;
208  bool doEndWalk = false;
209 
210  walkStateMachine(pte, nextRead, doEndWalk, fault);
211 
212  if (doEndWalk) {
213  DPRINTF(GPUPTWalker, "ending walk\n");
214  endWalk();
215  } else {
216  PacketPtr oldRead = read;
217 
218  //If we didn't return, we're setting up another read.
219  Request::Flags flags = oldRead->req->getFlags();
220  flags.set(Request::UNCACHEABLE, uncacheable);
221  RequestPtr request = std::make_shared<Request>(
222  nextRead, oldRead->getSize(), flags, walker->deviceRequestorId);
223 
224  read = new Packet(request, MemCmd::ReadReq);
225  read->allocate();
226 
227  delete oldRead;
228  }
229 
230  return fault;
231 }
232 
233 void
235  bool &doEndWalk, Fault &fault)
236 {
237  Addr vaddr = entry.vaddr;
238  bool badNX = pte.x && mode == BaseMMU::Execute && enableNX;
239  Addr part1 = 0;
240  Addr part2 = 0;
241  PageDirectoryEntry pde = static_cast<PageDirectoryEntry>(pte);
242 
243  // For a four level page table block fragment size should not be needed.
244  // For now issue a panic to prevent strange behavior if it is non-zero.
245  panic_if(pde.blockFragmentSize, "PDE blockFragmentSize must be 0");
246 
247  switch(state) {
248  case PDE2:
249  fatal_if(pde.p, "Fragment in PDE2 not implemented");
250 
251  // Read the pde1Addr
252  part1 = ((((uint64_t)pte) >> 6) << 3);
253  part2 = offsetFunc(vaddr, 3*9, 2*9);
254  nextRead = ((part1 + part2) << 3) & mask(48);
255  DPRINTF(GPUPTWalker,
256  "Got PDE2 entry %#016x. write:%s->%#016x va:%#016x\n",
257  (uint64_t)pte, pte.w == 0 ? "yes" : "no", nextRead, vaddr);
258  nextState = PDE1;
259  break;
260  case PDE1:
261  fatal_if(pde.p, "Fragment in PDE1 not implemented");
262 
263  // Read the pde0Addr
264  part1 = ((((uint64_t)pte) >> 6) << 3);
265  part2 = offsetFunc(vaddr, 2*9, 9);
266  nextRead = ((part1 + part2) << 3) & mask(48);
267  DPRINTF(GPUPTWalker,
268  "Got PDE1 entry %#016x. write:%s->%#016x va: %#016x\n",
269  (uint64_t)pte, pte.w == 0 ? "yes" : "no", nextRead, vaddr);
270  nextState = PDE0;
271  break;
272  case PDE0:
273  if (pde.p) {
274  DPRINTF(GPUPTWalker, "Treating PDE0 as PTE: %#016x frag: %d\n",
275  (uint64_t)pte, pte.fragment);
276  entry.pte = pte;
277  int fragment = pte.fragment;
278  entry.logBytes = PageShift + std::min(9, fragment);
279  entry.vaddr <<= PageShift;
280  entry.vaddr = entry.vaddr & ~((1 << entry.logBytes) - 1);
281  entry.vaddr = entry.vaddr & ~mask(entry.logBytes);
282  doEndWalk = true;
283  }
284  // Read the PteAddr
285  part1 = ((((uint64_t)pte) >> 6) << 3);
286  part2 = offsetFunc(vaddr, 9, 0);
287  nextRead = ((part1 + part2) << 3) & mask(48);
288  DPRINTF(GPUPTWalker,
289  "Got PDE0 entry %#016x. write:%s->%#016x va:%#016x\n",
290  (uint64_t)pte, pte.w == 0 ? "yes" : "no", nextRead, vaddr);
291  nextState = PTE;
292  break;
293  case PTE:
294  DPRINTF(GPUPTWalker,
295  " PTE entry %#016x. write: %s va: %#016x\n",
296  (uint64_t)pte, pte.w == 0 ? "yes" : "no", vaddr);
297  entry.pte = pte;
298  entry.logBytes = PageShift;
299  entry.vaddr <<= PageShift;
300  entry.vaddr = entry.vaddr & ~mask(entry.logBytes);
301  doEndWalk = true;
302  break;
303  default:
304  panic("Unknown page table walker state %d!\n");
305  }
306 
307  if (badNX || !pte.v) {
308  doEndWalk = true;
309  fault = pageFault(pte.v);
310  nextState = state;
311  }
312 }
313 
314 void
316 {
317  nextState = Ready;
318  delete read;
319  read = NULL;
320  walker->currStates.remove(this);
321 }
322 
326 void
328 {
329  // If we're already waiting for the port to become available, just return.
330  if (retrying)
331  return;
332 
333  if (!walker->sendTiming(this, read)) {
334  DPRINTF(GPUPTWalker, "Timing request for %#lx failed\n",
335  read->getAddr());
336 
337  retrying = true;
338  } else {
339  DPRINTF(GPUPTWalker, "Timing request for %#lx successful\n",
340  read->getAddr());
341  }
342 }
343 
344 bool Walker::sendTiming(WalkerState* sending_walker, PacketPtr pkt)
345 {
346  auto walker_state = new WalkerSenderState(sending_walker);
347  pkt->pushSenderState(walker_state);
348 
349  if (port.sendTimingReq(pkt)) {
350  DPRINTF(GPUPTWalker, "Sending timing read to %#lx from walker %p\n",
351  pkt->getAddr(), sending_walker);
352 
353  return true;
354  } else {
355  (void)pkt->popSenderState();
356  }
357 
358  return false;
359 }
360 
361 bool
363 {
364  walker->recvTimingResp(pkt);
365 
366  return true;
367 }
368 
369 void
371 {
372  WalkerSenderState * senderState =
373  safe_cast<WalkerSenderState *>(pkt->popSenderState());
374 
375  DPRINTF(GPUPTWalker, "Got response for %#lx from walker %p -- %#lx\n",
376  pkt->getAddr(), senderState->senderWalk, pkt->getLE<uint64_t>());
377  senderState->senderWalk->startWalk();
378 
379  delete senderState;
380 }
381 
382 void
384 {
385  walker->recvReqRetry();
386 }
387 
388 void
390 {
392  for (iter = currStates.begin(); iter != currStates.end(); iter++) {
393  WalkerState * walkerState = *(iter);
394  if (walkerState->isRetrying()) {
395  walkerState->retry();
396  }
397  }
398 }
399 
400 void
402 {
403  tlb->walkerResponse(entry, pkt);
404 
405  delete state;
406 }
407 
408 
409 /*
410  * Helper methods
411  */
412 bool
414 {
415  return retrying;
416 }
417 
418 void
420 {
421  retrying = false;
422  sendPackets();
423 }
424 
425 Fault
427 {
428  DPRINTF(GPUPTWalker, "Raising page fault.\n");
429  ExceptionCode code;
430  if (mode == BaseMMU::Read)
432  else if (mode == BaseMMU::Write)
434  else
436  if (mode == BaseMMU::Execute && !enableNX)
438  return std::make_shared<PageFault>(entry.vaddr, code, present, mode, true);
439 }
440 
441 uint64_t
442 Walker::WalkerState::offsetFunc(Addr logicalAddr, int top, int lsb)
443 {
444  assert(top < 32);
445  assert(lsb < 32);
446  return ((logicalAddr & ((1 << top) - 1)) >> lsb);
447 }
448 
449 
453 Port &
454 Walker::getPort(const std::string &if_name, PortID idx)
455 {
456  if (if_name == "port")
457  return port;
458  else
459  return ClockedObject::getPort(if_name, idx);
460 }
461 
462 } // namespace VegaISA
463 } // namespace gem5
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:245
gem5::VegaISA::Walker::recvReqRetry
void recvReqRetry()
Definition: pagetable_walker.cc:389
gem5::SimObject::getPort
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
Definition: sim_object.cc:126
gem5::BaseMMU::Read
@ Read
Definition: mmu.hh:56
gem5::VegaISA::Walker::WalkerState::started
bool started
Definition: pagetable_walker.hh:99
gem5::VegaISA::Walker::port
WalkerPort port
Definition: pagetable_walker.hh:73
gem5::NoFault
constexpr decltype(nullptr) NoFault
Definition: types.hh:253
gem5::RequestPort::sendTimingReq
bool sendTimingReq(PacketPtr pkt)
Attempt to send a timing request to the responder port by calling its corresponding receive function.
Definition: port.hh:495
gem5::VegaISA::Walker::WalkerPort::recvReqRetry
void recvReqRetry()
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
Definition: pagetable_walker.cc:383
gem5::VegaISA::Walker::WalkerState::getWalker
Walker * getWalker() const
Definition: pagetable_walker.hh:121
gem5::VegaISA::PageShift
const Addr PageShift
Definition: page_size.hh:41
abstract_mem.hh
gem5::VegaISA::Walker::WalkerState::stepWalk
Fault stepWalk()
Definition: pagetable_walker.cc:200
gem5::VegaISA::Walker::WalkerState::pageFault
Fault pageFault(bool present)
Definition: pagetable_walker.cc:426
gem5::VegaISA::Walker::WalkerState::walker
Walker * walker
Definition: pagetable_walker.hh:89
gem5::VegaISA::Walker::WalkerState::entry
VegaTlbEntry entry
Definition: pagetable_walker.hh:94
gem5::Packet::pushSenderState
void pushSenderState(SenderState *sender_state)
Push a new sender state to the packet and make the current sender state the predecessor of the new on...
Definition: packet.cc:330
gem5::BaseMMU::Mode
Mode
Definition: mmu.hh:56
gem5::Packet::req
RequestPtr req
A pointer to the original request.
Definition: packet.hh:374
gem5::BaseMMU::Write
@ Write
Definition: mmu.hh:56
gem5::VegaISA::Walker::recvTimingResp
void recvTimingResp(PacketPtr pkt)
Definition: pagetable_walker.cc:370
gem5::Request::PHYSICAL
@ PHYSICAL
The virtual address is also the physical address.
Definition: request.hh:117
gem5::VegaISA::Walker::funcState
WalkerState funcState
Definition: pagetable_walker.hh:139
gem5::VegaISA::Walker::WalkerState::startFunctional
Fault startFunctional(Addr base, Addr vaddr, PageTableEntry &pte, unsigned &logBytes)
Definition: pagetable_walker.cc:74
top
Definition: test.h:61
gem5::VegaISA::INST_PAGE
@ INST_PAGE
Definition: faults.hh:47
gem5::VegaISA::Walker::startTiming
void startTiming(PacketPtr pkt, Addr base, Addr vaddr, BaseMMU::Mode mode)
Definition: pagetable_walker.cc:109
gem5::VegaISA::GpuTLB::walkerResponse
void walkerResponse(VegaTlbEntry &entry, PacketPtr pkt)
Definition: tlb.cc:441
gem5::System::getDeviceMemory
memory::AbstractMemory * getDeviceMemory(const PacketPtr &pkt) const
Return a pointer to the device memory.
Definition: system.cc:322
gem5::X86ISA::base
Bitfield< 51, 12 > base
Definition: pagetable.hh:141
gem5::VegaISA::Walker::WalkerState
friend class WalkerState
Definition: pagetable_walker.hh:134
gem5::VegaISA::Walker::WalkerState::endWalk
void endWalk()
Definition: pagetable_walker.cc:315
gem5::VegaISA::Walker::sendTiming
bool sendTiming(WalkerState *sendingState, PacketPtr pkt)
Definition: pagetable_walker.cc:344
gem5::VegaISA::Walker::tlb
GpuTLB * tlb
Definition: pagetable_walker.hh:167
gem5::BaseMMU::Execute
@ Execute
Definition: mmu.hh:56
gem5::mask
constexpr uint64_t mask(unsigned nbits)
Generate a 64-bit mask of 'nbits' 1s, right justified.
Definition: bitfield.hh:63
gem5::VegaISA::fragment
Bitfield< 11, 7 > fragment
Definition: pagetable.hh:58
gem5::VegaISA::Walker::WalkerState::state
State state
Definition: pagetable_walker.hh:90
gem5::VegaISA::Walker::startFunctional
Fault startFunctional(Addr base, Addr vaddr, PageTableEntry &pte, unsigned &logBytes, BaseMMU::Mode mode)
Definition: pagetable_walker.cc:63
gem5::VegaISA::Walker::WalkerState::startWalk
void startWalk()
Definition: pagetable_walker.cc:162
gem5::VegaISA::Walker::WalkerState
Definition: pagetable_walker.hh:76
gem5::X86ISA::present
Bitfield< 7 > present
Definition: misc.hh:992
gem5::Flags< FlagsType >
gem5::VegaISA::Walker::walkerResponse
void walkerResponse(WalkerState *state, VegaTlbEntry &entry, PacketPtr pkt)
Definition: pagetable_walker.cc:401
gem5::Request::UNCACHEABLE
@ UNCACHEABLE
The request is to an uncacheable address.
Definition: request.hh:125
gem5::Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:248
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:291
gem5::probing::Packet
ProbePointArg< PacketInfo > Packet
Packet probe point.
Definition: mem.hh:109
gem5::VegaISA::Walker::baseAddr
Addr baseAddr
Definition: pagetable_walker.hh:171
gem5::VegaISA::Walker::WalkerState::offsetFunc
uint64_t offsetFunc(Addr logicalAddr, int top, int lsb)
Definition: pagetable_walker.cc:442
gem5::RequestPtr
std::shared_ptr< Request > RequestPtr
Definition: request.hh:92
pagetable_walker.hh
gem5::MemCmd::ReadReq
@ ReadReq
Definition: packet.hh:86
gem5::VegaISA::Walker::system
System * system
Definition: pagetable_walker.hh:183
gem5::VegaISA::Walker::WalkerState::read
PacketPtr read
Definition: pagetable_walker.hh:95
gem5::SparcISA::PageTableEntry
Definition: pagetable.hh:68
gem5::bits
constexpr T bits(T val, unsigned first, unsigned last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Definition: bitfield.hh:76
flags
uint8_t flags
Definition: helpers.cc:66
gem5::VegaISA::Walker::WalkerState::nextState
State nextState
Definition: pagetable_walker.hh:91
gem5::VegaISA::Walker::currStates
std::list< WalkerState * > currStates
Definition: pagetable_walker.hh:137
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
packet_access.hh
gem5::Packet::popSenderState
SenderState * popSenderState()
Pop the top of the state stack and return a pointer to it.
Definition: packet.cc:338
gem5::VegaISA::Walker::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
gem5 methods
Definition: pagetable_walker.cc:454
gem5::VegaISA::Walker::WalkerState::isRetrying
bool isRetrying()
Definition: pagetable_walker.cc:413
state
atomic_var_t state
Definition: helpers.cc:188
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:204
gem5::VegaISA::LOAD_PAGE
@ LOAD_PAGE
Definition: faults.hh:48
gem5::VegaISA::ExceptionCode
ExceptionCode
Definition: faults.hh:45
gem5::VegaISA::Walker::WalkerPort::recvTimingResp
bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
Definition: pagetable_walker.cc:362
faults.hh
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
gem5::VegaISA::Walker::WalkerState::initState
void initState(BaseMMU::Mode _mode, Addr baseAddr, Addr vaddr, bool is_functional=false)
Definition: pagetable_walker.cc:124
gem5::Packet::getLE
T getLE() const
Get the data in the packet byte swapped from little endian to host endian.
Definition: packet_access.hh:78
gem5::VegaISA::STORE_PAGE
@ STORE_PAGE
Definition: faults.hh:49
gem5::MipsISA::vaddr
vaddr
Definition: pra_constants.hh:278
gem5::VegaISA::Walker::WalkerState::sendPackets
void sendPackets()
Port related methods.
Definition: pagetable_walker.cc:327
std::list
STL list class.
Definition: stl.hh:51
gem5::Packet::getAddr
Addr getAddr() const
Definition: packet.hh:790
fatal_if
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition: logging.hh:226
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::VegaISA::Walker::WalkerState::walkStateMachine
void walkStateMachine(PageTableEntry &pte, Addr &nextRead, bool &doEndWalk, Fault &fault)
Definition: pagetable_walker.cc:234
gem5::VegaISA::Walker::WalkerState::retry
void retry()
Definition: pagetable_walker.cc:419
gem5::VegaISA::Walker::WalkerSenderState::senderWalk
WalkerState * senderWalk
Definition: pagetable_walker.hh:143
gem5::ArmISA::PTE
Definition: pagetable.hh:76
gem5::Packet::getSize
unsigned getSize() const
Definition: packet.hh:800
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:178
gem5::ArmISA::mode
Bitfield< 4, 0 > mode
Definition: misc_types.hh:74
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84
gem5::VegaISA::Walker::WalkerSenderState
Definition: pagetable_walker.hh:141

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