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gem5
v22.0.0.2
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#include <pcireg.h>
Public Attributes | |
| uint8_t | data [24] |
| struct { | |
| uint16_t mid | |
| uint16_t mc | |
| uint32_t ma | |
| uint32_t mua | |
| uint16_t md | |
| uint32_t mmask | |
| uint32_t mpend | |
| }; | |
Defines the MSI Capability register and its associated bitfields for the a PCI/PCIe device. Both the MSI capability and the MSIX capability can be filled in if a device model supports both, but only 1 of MSI/MSIX/INTx interrupt mode can be selected at a given time.
| struct { ... } |
| uint32_t MSICAP::ma |
Definition at line 271 of file pcireg.h.
Referenced by gem5::PciDevice::PciDevice(), gem5::PciDevice::serialize(), and gem5::PciDevice::unserialize().
| uint16_t MSICAP::mc |
Definition at line 264 of file pcireg.h.
Referenced by gem5::PciDevice::PciDevice(), gem5::PciDevice::serialize(), and gem5::PciDevice::unserialize().
| uint16_t MSICAP::md |
Definition at line 275 of file pcireg.h.
Referenced by gem5::PciDevice::PciDevice(), gem5::PciDevice::serialize(), and gem5::PciDevice::unserialize().
| uint16_t MSICAP::mid |
Definition at line 261 of file pcireg.h.
Referenced by gem5::PciDevice::PciDevice(), gem5::PciDevice::serialize(), and gem5::PciDevice::unserialize().
| uint32_t MSICAP::mmask |
Definition at line 276 of file pcireg.h.
Referenced by gem5::PciDevice::PciDevice(), gem5::PciDevice::serialize(), and gem5::PciDevice::unserialize().
| uint32_t MSICAP::mpend |
Definition at line 277 of file pcireg.h.
Referenced by gem5::PciDevice::PciDevice(), gem5::PciDevice::serialize(), and gem5::PciDevice::unserialize().
| uint32_t MSICAP::mua |
Definition at line 274 of file pcireg.h.
Referenced by gem5::PciDevice::PciDevice(), gem5::PciDevice::serialize(), and gem5::PciDevice::unserialize().