gem5  v22.0.0.2
float.hh
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37 
38 #ifndef __ARCH_X86_FLOATREGS_HH__
39 #define __ARCH_X86_FLOATREGS_HH__
40 
41 #include "arch/x86/x86_traits.hh"
42 #include "base/bitunion.hh"
43 
44 namespace gem5
45 {
46 namespace X86ISA
47 {
48 namespace float_reg
49 {
51 {
52  // MMX/X87 registers
63 
72 
106 
116 
118 };
119 
120 static inline RegId
121 mmx(int index)
122 {
123  return RegId(FloatRegClass, MmxBase + index);
124 }
125 
126 static inline RegId
127 fpr(int index)
128 {
129  return RegId(FloatRegClass, FprBase + index);
130 }
131 
132 static inline RegId
133 xmm(int index)
134 {
135  return RegId(FloatRegClass, XmmBase + index);
136 }
137 
138 static inline RegId
140 {
141  return RegId(FloatRegClass, XmmBase + 2 * index);
142 }
143 
144 static inline RegId
146 {
147  return RegId(FloatRegClass, XmmBase + 2 * index + 1);
148 }
149 
150 static inline RegId
152 {
154 }
155 
156 static inline RegId
157 stack(int index, int top)
158 {
159  return fpr((top + index + 8) % 8);
160 }
161 
162 } // namespace float_reg
163 
164 } // namespace X86ISA
165 } // namespace gem5
166 
167 #endif // __ARCH_X86_FLOATREGS_HH__
gem5::X86ISA::float_reg::_Xmm0LowIdx
@ _Xmm0LowIdx
Definition: float.hh:74
gem5::X86ISA::float_reg::_Xmm8LowIdx
@ _Xmm8LowIdx
Definition: float.hh:90
x86_traits.hh
gem5::X86ISA::float_reg::_Xmm5LowIdx
@ _Xmm5LowIdx
Definition: float.hh:84
gem5::X86ISA::float_reg::_Xmm11LowIdx
@ _Xmm11LowIdx
Definition: float.hh:96
gem5::X86ISA::float_reg::_Xmm1LowIdx
@ _Xmm1LowIdx
Definition: float.hh:76
gem5::X86ISA::float_reg::xmm
static RegId xmm(int index)
Definition: float.hh:133
gem5::X86ISA::float_reg::_Fpr7Idx
@ _Fpr7Idx
Definition: float.hh:71
gem5::X86ISA::float_reg::XmmBase
@ XmmBase
Definition: float.hh:73
gem5::X86ISA::float_reg::_Xmm2LowIdx
@ _Xmm2LowIdx
Definition: float.hh:78
gem5::X86ISA::float_reg::_Microfp1Idx
@ _Microfp1Idx
Definition: float.hh:109
gem5::X86ISA::float_reg::FloatRegIndex
FloatRegIndex
Definition: float.hh:50
top
Definition: test.h:61
gem5::X86ISA::float_reg::MmxBase
@ MmxBase
Definition: float.hh:53
gem5::X86ISA::float_reg::_Xmm2HighIdx
@ _Xmm2HighIdx
Definition: float.hh:79
gem5::X86ISA::float_reg::_Xmm14HighIdx
@ _Xmm14HighIdx
Definition: float.hh:103
gem5::X86ISA::float_reg::_Microfp4Idx
@ _Microfp4Idx
Definition: float.hh:112
gem5::X86ISA::float_reg::_Xmm14LowIdx
@ _Xmm14LowIdx
Definition: float.hh:102
gem5::X86ISA::float_reg::_Microfp3Idx
@ _Microfp3Idx
Definition: float.hh:111
gem5::X86ISA::float_reg::_Microfp6Idx
@ _Microfp6Idx
Definition: float.hh:114
gem5::X86ISA::float_reg::_Mmx6Idx
@ _Mmx6Idx
Definition: float.hh:61
gem5::X86ISA::float_reg::_Xmm15HighIdx
@ _Xmm15HighIdx
Definition: float.hh:105
gem5::X86ISA::float_reg::_Mmx0Idx
@ _Mmx0Idx
Definition: float.hh:55
gem5::X86ISA::float_reg::_Xmm12LowIdx
@ _Xmm12LowIdx
Definition: float.hh:98
gem5::X86ISA::float_reg::NumRegs
@ NumRegs
Definition: float.hh:117
gem5::FloatRegClass
@ FloatRegClass
Floating-point register.
Definition: reg_class.hh:59
gem5::X86ISA::float_reg::_Xmm0HighIdx
@ _Xmm0HighIdx
Definition: float.hh:75
gem5::X86ISA::float_reg::_Xmm1HighIdx
@ _Xmm1HighIdx
Definition: float.hh:77
gem5::X86ISA::float_reg::_Xmm9LowIdx
@ _Xmm9LowIdx
Definition: float.hh:92
gem5::X86ISA::float_reg::_Xmm13LowIdx
@ _Xmm13LowIdx
Definition: float.hh:100
gem5::X86ISA::float_reg::_Xmm6HighIdx
@ _Xmm6HighIdx
Definition: float.hh:87
gem5::X86ISA::float_reg::xmmLow
static RegId xmmLow(int index)
Definition: float.hh:139
bitunion.hh
gem5::X86ISA::NumXMMRegs
const int NumXMMRegs
Definition: x86_traits.hh:53
gem5::X86ISA::float_reg::xmmHigh
static RegId xmmHigh(int index)
Definition: float.hh:145
gem5::X86ISA::float_reg::fpr
static RegId fpr(int index)
Definition: float.hh:127
gem5::X86ISA::NumMMXRegs
const int NumMMXRegs
Definition: x86_traits.hh:52
gem5::X86ISA::float_reg::_Xmm15LowIdx
@ _Xmm15LowIdx
Definition: float.hh:104
gem5::X86ISA::float_reg::_Fpr5Idx
@ _Fpr5Idx
Definition: float.hh:69
gem5::X86ISA::float_reg::_Mmx4Idx
@ _Mmx4Idx
Definition: float.hh:59
gem5::X86ISA::float_reg::_Xmm4HighIdx
@ _Xmm4HighIdx
Definition: float.hh:83
gem5::X86ISA::float_reg::mmx
static RegId mmx(int index)
Definition: float.hh:121
gem5::X86ISA::float_reg::_Xmm11HighIdx
@ _Xmm11HighIdx
Definition: float.hh:97
gem5::X86ISA::float_reg::stack
static RegId stack(int index, int top)
Definition: float.hh:157
gem5::X86ISA::float_reg::_Xmm10LowIdx
@ _Xmm10LowIdx
Definition: float.hh:94
gem5::X86ISA::float_reg::_Xmm12HighIdx
@ _Xmm12HighIdx
Definition: float.hh:99
gem5::X86ISA::float_reg::_Xmm9HighIdx
@ _Xmm9HighIdx
Definition: float.hh:93
gem5::X86ISA::float_reg::_Fpr1Idx
@ _Fpr1Idx
Definition: float.hh:65
gem5::X86ISA::float_reg::_Xmm7HighIdx
@ _Xmm7HighIdx
Definition: float.hh:89
gem5::X86ISA::float_reg::_Xmm6LowIdx
@ _Xmm6LowIdx
Definition: float.hh:86
gem5::X86ISA::float_reg::_Mmx2Idx
@ _Mmx2Idx
Definition: float.hh:57
gem5::X86ISA::float_reg::_Fpr6Idx
@ _Fpr6Idx
Definition: float.hh:70
gem5::X86ISA::float_reg::_Xmm3LowIdx
@ _Xmm3LowIdx
Definition: float.hh:80
gem5::X86ISA::float_reg::_Mmx1Idx
@ _Mmx1Idx
Definition: float.hh:56
gem5::X86ISA::float_reg::_Fpr0Idx
@ _Fpr0Idx
Definition: float.hh:64
gem5::X86ISA::float_reg::_Mmx3Idx
@ _Mmx3Idx
Definition: float.hh:58
gem5::X86ISA::float_reg::FprBase
@ FprBase
Definition: float.hh:54
gem5::X86ISA::float_reg::_Xmm13HighIdx
@ _Xmm13HighIdx
Definition: float.hh:101
gem5::X86ISA::float_reg::_Fpr4Idx
@ _Fpr4Idx
Definition: float.hh:68
gem5::X86ISA::index
Bitfield< 5, 3 > index
Definition: types.hh:98
gem5::X86ISA::float_reg::_Xmm3HighIdx
@ _Xmm3HighIdx
Definition: float.hh:81
gem5::X86ISA::float_reg::_Mmx5Idx
@ _Mmx5Idx
Definition: float.hh:60
gem5::X86ISA::float_reg::_Xmm5HighIdx
@ _Xmm5HighIdx
Definition: float.hh:85
gem5::X86ISA::float_reg::MicrofpBase
@ MicrofpBase
Definition: float.hh:107
gem5::X86ISA::float_reg::_Microfp0Idx
@ _Microfp0Idx
Definition: float.hh:108
gem5::X86ISA::float_reg::_Fpr3Idx
@ _Fpr3Idx
Definition: float.hh:67
gem5::X86ISA::float_reg::_Microfp7Idx
@ _Microfp7Idx
Definition: float.hh:115
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::X86ISA::float_reg::_Xmm8HighIdx
@ _Xmm8HighIdx
Definition: float.hh:91
gem5::X86ISA::float_reg::_Xmm10HighIdx
@ _Xmm10HighIdx
Definition: float.hh:95
gem5::X86ISA::float_reg::_Microfp5Idx
@ _Microfp5Idx
Definition: float.hh:113
gem5::X86ISA::float_reg::_Mmx7Idx
@ _Mmx7Idx
Definition: float.hh:62
gem5::X86ISA::float_reg::_Xmm4LowIdx
@ _Xmm4LowIdx
Definition: float.hh:82
gem5::X86ISA::float_reg::_Microfp2Idx
@ _Microfp2Idx
Definition: float.hh:110
gem5::X86ISA::float_reg::_Xmm7LowIdx
@ _Xmm7LowIdx
Definition: float.hh:88
gem5::RegId
Register ID: describe an architectural register with its class and index.
Definition: reg_class.hh:126
gem5::X86ISA::float_reg::_Fpr2Idx
@ _Fpr2Idx
Definition: float.hh:66
gem5::X86ISA::float_reg::microfp
static RegId microfp(int index)
Definition: float.hh:151
gem5::X86ISA::NumMicroFpRegs
const int NumMicroFpRegs
Definition: x86_traits.hh:54

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