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gem5
v22.1.0.0
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A non-coherent crossbar connects a number of non-snooping memory-side ports and cpu_sides, and routes the request and response packets based on the address. More...
#include <noncoherent_xbar.hh>
Classes | |
| class | NoncoherentXBarRequestPort |
| Declaration of the crossbar memory-side port type, one will be instantiated for each of the CPU-side ports connecting to the crossbar. More... | |
| class | NoncoherentXBarResponsePort |
| Declaration of the non-coherent crossbar CPU-side port type, one will be instantiated for each of the memory-side ports connecting to the crossbar. More... | |
Public Member Functions | |
| NoncoherentXBar (const NoncoherentXBarParams &p) | |
| virtual | ~NoncoherentXBar () |
Public Member Functions inherited from gem5::BaseXBar | |
| virtual | ~BaseXBar () |
| Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
| A function used to return the port associated with this object. More... | |
| void | regStats () override |
| Callback to set stat parameters. More... | |
Public Member Functions inherited from gem5::ClockedObject | |
| ClockedObject (const ClockedObjectParams &p) | |
| void | serialize (CheckpointOut &cp) const override |
| Serialize an object. More... | |
| void | unserialize (CheckpointIn &cp) override |
| Unserialize an object. More... | |
Public Member Functions inherited from gem5::SimObject | |
| const Params & | params () const |
| SimObject (const Params &p) | |
| virtual | ~SimObject () |
| virtual void | init () |
| init() is called after all C++ SimObjects have been created and all ports are connected. More... | |
| virtual void | loadState (CheckpointIn &cp) |
| loadState() is called on each SimObject when restoring from a checkpoint. More... | |
| virtual void | initState () |
| initState() is called on each SimObject when not restoring from a checkpoint. More... | |
| virtual void | regProbePoints () |
| Register probe points for this object. More... | |
| virtual void | regProbeListeners () |
| Register probe listeners for this object. More... | |
| ProbeManager * | getProbeManager () |
| Get the probe manager for this object. More... | |
| virtual void | startup () |
| startup() is the final initialization call before simulation. More... | |
| DrainState | drain () override |
| Provide a default implementation of the drain interface for objects that don't need draining. More... | |
| virtual void | memWriteback () |
| Write back dirty buffers to memory using functional writes. More... | |
| virtual void | memInvalidate () |
| Invalidate the contents of memory buffers. More... | |
| void | serialize (CheckpointOut &cp) const override |
| Serialize an object. More... | |
| void | unserialize (CheckpointIn &cp) override |
| Unserialize an object. More... | |
Public Member Functions inherited from gem5::EventManager | |
| EventQueue * | eventQueue () const |
| void | schedule (Event &event, Tick when) |
| void | deschedule (Event &event) |
| void | reschedule (Event &event, Tick when, bool always=false) |
| void | schedule (Event *event, Tick when) |
| void | deschedule (Event *event) |
| void | reschedule (Event *event, Tick when, bool always=false) |
| void | wakeupEventQueue (Tick when=(Tick) -1) |
| This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More... | |
| void | setCurTick (Tick newVal) |
| EventManager (EventManager &em) | |
| Event manger manages events in the event queue. More... | |
| EventManager (EventManager *em) | |
| EventManager (EventQueue *eq) | |
Public Member Functions inherited from gem5::Serializable | |
| Serializable () | |
| virtual | ~Serializable () |
| void | serializeSection (CheckpointOut &cp, const char *name) const |
| Serialize an object into a new section. More... | |
| void | serializeSection (CheckpointOut &cp, const std::string &name) const |
| void | unserializeSection (CheckpointIn &cp, const char *name) |
| Unserialize an a child object. More... | |
| void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Member Functions inherited from gem5::Drainable | |
| DrainState | drainState () const |
| Return the current drain state of an object. More... | |
| virtual void | notifyFork () |
| Notify a child process of a fork. More... | |
Public Member Functions inherited from gem5::statistics::Group | |
| Group (Group *parent, const char *name=nullptr) | |
| Construct a new statistics group. More... | |
| virtual | ~Group () |
| virtual void | resetStats () |
| Callback to reset stats. More... | |
| virtual void | preDumpStats () |
| Callback before stats are dumped. More... | |
| void | addStat (statistics::Info *info) |
| Register a stat with this group. More... | |
| const std::map< std::string, Group * > & | getStatGroups () const |
| Get all child groups associated with this object. More... | |
| const std::vector< Info * > & | getStats () const |
| Get all stats associated with this object. More... | |
| void | addStatGroup (const char *name, Group *block) |
| Add a stat block as a child of this block. More... | |
| const Info * | resolveStat (std::string name) const |
| Resolve a stat by its name within this group. More... | |
| void | mergeStatGroup (Group *block) |
| Merge the contents (stats & children) of a block to this block. More... | |
| Group ()=delete | |
| Group (const Group &)=delete | |
| Group & | operator= (const Group &)=delete |
Public Member Functions inherited from gem5::Named | |
| Named (const std::string &name_) | |
| virtual | ~Named ()=default |
| virtual std::string | name () const |
Public Member Functions inherited from gem5::Clocked | |
| void | updateClockPeriod () |
| Update the tick to the current tick. More... | |
| Tick | clockEdge (Cycles cycles=Cycles(0)) const |
| Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More... | |
| Cycles | curCycle () const |
| Determine the current cycle, corresponding to a tick aligned to a clock edge. More... | |
| Tick | nextCycle () const |
| Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More... | |
| uint64_t | frequency () const |
| Tick | clockPeriod () const |
| double | voltage () const |
| Cycles | ticksToCycles (Tick t) const |
| Tick | cyclesToTicks (Cycles c) const |
Protected Member Functions | |
| virtual bool | recvTimingReq (PacketPtr pkt, PortID cpu_side_port_id) |
| virtual bool | recvTimingResp (PacketPtr pkt, PortID mem_side_port_id) |
| void | recvReqRetry (PortID mem_side_port_id) |
| Tick | recvAtomicBackdoor (PacketPtr pkt, PortID cpu_side_port_id, MemBackdoorPtr *backdoor=nullptr) |
| void | recvFunctional (PacketPtr pkt, PortID cpu_side_port_id) |
Protected Member Functions inherited from gem5::BaseXBar | |
| virtual void | recvRangeChange (PortID mem_side_port_id) |
| Function called by the port when the crossbar is recieving a range change. More... | |
| PortID | findPort (AddrRange addr_range) |
| Find which port connected to this crossbar (if any) should be given a packet with this address range. More... | |
| AddrRangeList | getAddrRanges () const |
| Return the address ranges the crossbar is responsible for. More... | |
| void | calcPacketTiming (PacketPtr pkt, Tick header_delay) |
| Calculate the timing parameters for the packet. More... | |
| BaseXBar (const BaseXBarParams &p) | |
Protected Member Functions inherited from gem5::Drainable | |
| Drainable () | |
| virtual | ~Drainable () |
| virtual void | drainResume () |
| Resume execution after a successful drain. More... | |
| void | signalDrainDone () const |
| Signal that an object is drained. More... | |
Protected Member Functions inherited from gem5::Clocked | |
| Clocked (ClockDomain &clk_domain) | |
| Create a clocked object and set the clock domain based on the parameters. More... | |
| Clocked (Clocked &)=delete | |
| Clocked & | operator= (Clocked &)=delete |
| virtual | ~Clocked () |
| Virtual destructor due to inheritance. More... | |
| void | resetClock () const |
| Reset the object's clock using the current global tick value. More... | |
| virtual void | clockPeriodUpdated () |
| A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More... | |
Protected Attributes | |
| std::vector< ReqLayer * > | reqLayers |
| Declare the layers of this crossbar, one vector for requests and one for responses. More... | |
| std::vector< RespLayer * > | respLayers |
Protected Attributes inherited from gem5::BaseXBar | |
| const Cycles | frontendLatency |
| Cycles of front-end pipeline including the delay to accept the request and to decode the address. More... | |
| const Cycles | forwardLatency |
| const Cycles | responseLatency |
| const Cycles | headerLatency |
| Cycles the layer is occupied processing the packet header. More... | |
| const uint32_t | width |
| the width of the xbar in bytes More... | |
| AddrRangeMap< PortID, 3 > | portMap |
| std::unordered_map< RequestPtr, PortID > | routeTo |
| Remember where request packets came from so that we can route responses to the appropriate port. More... | |
| AddrRangeList | xbarRanges |
| all contigous ranges seen by this crossbar More... | |
| AddrRange | defaultRange |
| std::vector< bool > | gotAddrRanges |
| Remember for each of the memory-side ports of the crossbar if we got an address range from the connected CPU-side ports. More... | |
| bool | gotAllAddrRanges |
| std::vector< QueuedResponsePort * > | cpuSidePorts |
| The memory-side ports and CPU-side ports of the crossbar. More... | |
| std::vector< RequestPort * > | memSidePorts |
| PortID | defaultPortID |
| Port that handles requests that don't match any of the interfaces. More... | |
| const bool | useDefaultRange |
| If true, use address range provided by default device. More... | |
| statistics::Vector | transDist |
| Stats for transaction distribution and data passing through the crossbar. More... | |
| statistics::Vector2d | pktCount |
| statistics::Vector2d | pktSize |
Protected Attributes inherited from gem5::SimObject | |
| const SimObjectParams & | _params |
| Cached copy of the object parameters. More... | |
Protected Attributes inherited from gem5::EventManager | |
| EventQueue * | eventq |
| A pointer to this object's event queue. More... | |
Additional Inherited Members | |
Public Types inherited from gem5::ClockedObject | |
| using | Params = ClockedObjectParams |
| Parameters of ClockedObject. More... | |
Public Types inherited from gem5::SimObject | |
| typedef SimObjectParams | Params |
Static Public Member Functions inherited from gem5::SimObject | |
| static void | serializeAll (const std::string &cpt_dir) |
| Create a checkpoint by serializing all SimObjects in the system. More... | |
| static SimObject * | find (const char *name) |
| Find the SimObject with the given name and return a pointer to it. More... | |
| static void | setSimObjectResolver (SimObjectResolver *resolver) |
| There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More... | |
| static SimObjectResolver * | getSimObjectResolver () |
| There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More... | |
Static Public Member Functions inherited from gem5::Serializable | |
| static const std::string & | currentSection () |
| Gets the fully-qualified name of the active section. More... | |
| static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
| Generate a checkpoint file so that the serialization can be routed to it. More... | |
Public Attributes inherited from gem5::ClockedObject | |
| PowerState * | powerState |
A non-coherent crossbar connects a number of non-snooping memory-side ports and cpu_sides, and routes the request and response packets based on the address.
The request packets issued by the memory-side port connected to a non-coherent crossbar could still snoop in caches attached to a coherent crossbar, as is the case with the I/O bus and memory bus in most system configurations. No snoops will, however, reach any memory-side port on the non-coherent crossbar itself.
The non-coherent crossbar can be used as a template for modelling PCIe, and non-coherent AMBA and OCP buses, and is typically used for the I/O buses.
Definition at line 68 of file noncoherent_xbar.hh.
| gem5::NoncoherentXBar::NoncoherentXBar | ( | const NoncoherentXBarParams & | p | ) |
Definition at line 56 of file noncoherent_xbar.cc.
References gem5::BaseXBar::cpuSidePorts, gem5::csprintf(), gem5::BaseXBar::defaultPortID, gem5::ArmISA::i, gem5::BaseXBar::memSidePorts, gem5::Named::name(), gem5::VegaISA::p, reqLayers, and respLayers.
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Definition at line 93 of file noncoherent_xbar.cc.
References gem5::VegaISA::l, reqLayers, and respLayers.
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Definition at line 247 of file noncoherent_xbar.cc.
References gem5::Packet::cmdString(), gem5::Packet::cmdToIndex(), gem5::BaseXBar::cpuSidePorts, DPRINTF, gem5::BaseXBar::findPort(), gem5::Packet::getAddr(), gem5::Packet::getAddrRange(), gem5::Packet::getSize(), gem5::Packet::hasData(), gem5::Packet::isResponse(), gem5::BaseXBar::memSidePorts, gem5::Named::name(), gem5::Packet::payloadDelay, gem5::BaseXBar::pktCount, gem5::BaseXBar::pktSize, and gem5::BaseXBar::transDist.
Referenced by gem5::NoncoherentXBar::NoncoherentXBarResponsePort::recvAtomic(), and gem5::NoncoherentXBar::NoncoherentXBarResponsePort::recvAtomicBackdoor().
Definition at line 288 of file noncoherent_xbar.cc.
References gem5::Packet::cmdString(), gem5::BaseXBar::cpuSidePorts, DPRINTF, gem5::BaseXBar::findPort(), gem5::Packet::getAddr(), gem5::Packet::getAddrRange(), gem5::Packet::isPrint(), gem5::Packet::makeResponse(), gem5::BaseXBar::memSidePorts, gem5::Named::name(), gem5::Packet::needsResponse(), and gem5::VegaISA::p.
Referenced by gem5::NoncoherentXBar::NoncoherentXBarResponsePort::recvFunctional().
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Definition at line 238 of file noncoherent_xbar.cc.
References reqLayers.
Referenced by gem5::NoncoherentXBar::NoncoherentXBarRequestPort::recvReqRetry().
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Reimplemented in gem5::HMCController.
Definition at line 102 of file noncoherent_xbar.cc.
References gem5::Packet::cacheResponding(), gem5::BaseXBar::calcPacketTiming(), gem5::Clocked::clockEdge(), gem5::Clocked::clockPeriod(), gem5::Packet::cmdString(), gem5::Packet::cmdToIndex(), gem5::BaseXBar::cpuSidePorts, DPRINTF, gem5::BaseXBar::findPort(), gem5::BaseXBar::forwardLatency, gem5::BaseXBar::frontendLatency, gem5::Packet::getAddr(), gem5::Packet::getAddrRange(), gem5::Packet::getSize(), gem5::Packet::hasData(), gem5::Packet::headerDelay, gem5::Packet::isExpressSnoop(), gem5::BaseXBar::memSidePorts, gem5::Port::name(), gem5::Packet::needsResponse(), gem5::Packet::payloadDelay, gem5::BaseXBar::pktCount, gem5::BaseXBar::pktSize, gem5::Packet::req, reqLayers, gem5::BaseXBar::routeTo, and gem5::BaseXBar::transDist.
Referenced by gem5::NoncoherentXBar::NoncoherentXBarResponsePort::recvTimingReq().
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protectedvirtual |
Definition at line 180 of file noncoherent_xbar.cc.
References gem5::BaseXBar::calcPacketTiming(), gem5::Clocked::clockEdge(), gem5::Clocked::clockPeriod(), gem5::Packet::cmdString(), gem5::Packet::cmdToIndex(), gem5::BaseXBar::cpuSidePorts, gem5::curTick(), DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getSize(), gem5::Packet::hasData(), gem5::Packet::headerDelay, gem5::InvalidPortID, gem5::BaseXBar::memSidePorts, gem5::Port::name(), gem5::Packet::payloadDelay, gem5::BaseXBar::pktCount, gem5::BaseXBar::pktSize, gem5::Packet::req, respLayers, gem5::BaseXBar::responseLatency, gem5::BaseXBar::routeTo, and gem5::BaseXBar::transDist.
Referenced by gem5::NoncoherentXBar::NoncoherentXBarRequestPort::recvTimingResp().
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Declare the layers of this crossbar, one vector for requests and one for responses.
Definition at line 77 of file noncoherent_xbar.hh.
Referenced by NoncoherentXBar(), recvReqRetry(), gem5::HMCController::recvTimingReq(), recvTimingReq(), and ~NoncoherentXBar().
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Definition at line 78 of file noncoherent_xbar.hh.
Referenced by NoncoherentXBar(), recvTimingResp(), and ~NoncoherentXBar().