Base class for all X86 static instructions. More...

#include <static_inst.hh>

Inheritance diagram for gem5::X86ISA::X86StaticInst:

Static Public Member Functions
static void	printMnemonic (std::ostream &os, const char *mnemonic)

static void	printMnemonic (std::ostream &os, const char instMnemonic, const char mnemonic)

static void	printMem (std::ostream &os, uint8_t segment, uint8_t scale, RegIndex index, RegIndex base, uint64_t disp, uint8_t addressSize, bool rip)

static void	printSegment (std::ostream &os, int segment)

static void	printReg (std::ostream &os, RegId reg, int size)

Public Attributes
ExtMachInst	machInst

Protected Types
using	ExtMachInst = X86ISA::ExtMachInst

Protected Member Functions
	X86StaticInst (const char *mnem, ExtMachInst _machInst, OpClass __opClass)

std::string	generateDisassembly (Addr pc, const loader::SymbolTable *symtab) const override
	Internal function to generate disassembly string.

void	advancePC (PCStateBase &pcState) const override

void	advancePC (ThreadContext *tc) const override

std::unique_ptr< PCStateBase >	buildRetPC (const PCStateBase &cur_pc, const PCStateBase &call_pc) const override

Protected Member Functions inherited from gem5::StaticInst
void	setRegIdxArrays (RegIdArrayPtr src, RegIdArrayPtr dest)
	Set the pointers which point to the arrays of source and destination register indices.

	StaticInst (const char *_mnemonic, OpClass op_class)
	Constructor.

template<typename T >
size_t	simpleAsBytes (void *buf, size_t max_size, const T &t)

Static Protected Member Functions
static void	divideStep (uint64_t divident, uint64_t divisor, uint64_t &quotient, uint64_t &remainder)

static uint64_t	merge (uint64_t into, RegIndex index, uint64_t val, int size)

static uint64_t	pick (uint64_t from, RegIndex index, int size)

static int64_t	signedPick (uint64_t from, RegIndex index, int size)

Additional Inherited Members
Public Types inherited from gem5::StaticInst
using	RegIdArrayPtr = RegId(StaticInst::*)[]

Public Member Functions inherited from gem5::StaticInst
uint8_t	numSrcRegs () const
	Number of source registers.

uint8_t	numDestRegs () const
	Number of destination registers.

uint8_t	numDestRegs (RegClassType type) const
	Number of destination registers of a particular type.

bool	isNop () const

bool	isMemRef () const

bool	isLoad () const

bool	isStore () const

bool	isAtomic () const

bool	isStoreConditional () const

bool	isInstPrefetch () const

bool	isDataPrefetch () const

bool	isPrefetch () const

bool	isInteger () const

bool	isFloating () const

bool	isVector () const

bool	isMatrix () const

bool	isControl () const

bool	isCall () const

bool	isReturn () const

bool	isDirectCtrl () const

bool	isIndirectCtrl () const

bool	isCondCtrl () const

bool	isUncondCtrl () const

bool	isSerializing () const

bool	isSerializeBefore () const

bool	isSerializeAfter () const

bool	isSquashAfter () const

bool	isFullMemBarrier () const

bool	isReadBarrier () const

bool	isWriteBarrier () const

bool	isNonSpeculative () const

bool	isQuiesce () const

bool	isUnverifiable () const

bool	isSyscall () const

bool	isMacroop () const

bool	isMicroop () const

bool	isDelayedCommit () const

bool	isLastMicroop () const

bool	isFirstMicroop () const

bool	isHtmStart () const

bool	isHtmStop () const

bool	isHtmCancel () const

bool	isHtmCmd () const

void	setFirstMicroop ()

void	setLastMicroop ()

void	setDelayedCommit ()

void	setFlag (Flags f)

OpClass	opClass () const
	Operation class. Used to select appropriate function unit in issue.

const RegId &	destRegIdx (int i) const
	Return logical index (architectural reg num) of i'th destination reg.

void	setDestRegIdx (int i, const RegId &val)

const RegId &	srcRegIdx (int i) const
	Return logical index (architectural reg num) of i'th source reg.

void	setSrcRegIdx (int i, const RegId &val)

virtual uint64_t	getEMI () const

virtual	~StaticInst ()

virtual Fault	execute (ExecContext xc, trace::InstRecord traceData) const =0

virtual Fault	initiateAcc (ExecContext xc, trace::InstRecord traceData) const

virtual Fault	completeAcc (Packet pkt, ExecContext xc, trace::InstRecord *trace_data) const

virtual StaticInstPtr	fetchMicroop (MicroPC upc) const
	Return the microop that goes with a particular micropc.

virtual std::unique_ptr< PCStateBase >	branchTarget (const PCStateBase &pc) const
	Return the target address for a PC-relative branch.

virtual std::unique_ptr< PCStateBase >	branchTarget (ThreadContext *tc) const
	Return the target address for an indirect branch (jump).

virtual const std::string &	disassemble (Addr pc, const loader::SymbolTable *symtab=nullptr) const
	Return string representation of disassembled instruction.

void	printFlags (std::ostream &outs, const std::string &separator) const
	Print a separator separated list of this instruction's set flag names on the given stream.

std::string	getName ()
	Return name of machine instruction.

virtual size_t	asBytes (void *buf, size_t max_size)
	Instruction classes can override this function to return a a representation of themselves as a blob of bytes, generally assumed to be that instructions ExtMachInst.

Public Member Functions inherited from gem5::RefCounted
	RefCounted ()
	We initialize the reference count to zero and the first object to take ownership of it must increment it to one.

virtual	~RefCounted ()
	We make the destructor virtual because we're likely to have virtual functions on reference counted objects.

void	incref () const
	Increment the reference count.

void	decref () const
	Decrement the reference count and destroy the object if all references are gone.

Static Public Attributes inherited from gem5::StaticInst
static StaticInstPtr	nullStaticInstPtr
	Pointer to a statically allocated "null" instruction object.

Protected Attributes inherited from gem5::StaticInst
std::bitset< Num_Flags >	flags
	Flag values for this instruction.

OpClass	_opClass
	See opClass().

uint8_t	_numSrcRegs = 0
	See numSrcRegs().

uint8_t	_numDestRegs = 0
	See numDestRegs().

std::array< uint8_t, MiscRegClass+1 >	_numTypedDestRegs = {}

const char *	mnemonic
	Base mnemonic (e.g., "add").

std::unique_ptr< std::string >	cachedDisassembly
	String representation of disassembly (lazily evaluated via disassemble()).

Detailed Description

Base class for all X86 static instructions.

Definition at line 100 of file static_inst.hh.

Member Typedef Documentation

◆ ExtMachInst

using gem5::X86ISA::X86StaticInst::ExtMachInst = X86ISA::ExtMachInst

protected

Definition at line 115 of file static_inst.hh.

Constructor & Destructor Documentation

◆ X86StaticInst()

gem5::X86ISA::X86StaticInst::X86StaticInst	(	const char *	mnem,
		ExtMachInst	_machInst,
		OpClass	__opClass
	)

inlineprotected

Definition at line 122 of file static_inst.hh.

Member Function Documentation

◆ advancePC() [1/2]

void gem5::X86ISA::X86StaticInst::advancePC ( PCStateBase & pcState ) const

inlineoverrideprotectedvirtual

Implements gem5::StaticInst.

Definition at line 204 of file static_inst.hh.

References gem5::PCStateBase::as().

◆ advancePC() [2/2]

void gem5::X86ISA::X86StaticInst::advancePC ( ThreadContext * tc ) const

inlineoverrideprotectedvirtual

Reimplemented from gem5::StaticInst.

Definition at line 210 of file static_inst.hh.

References gem5::PCStateBase::as(), gem5::X86ISA::pc, and gem5::ThreadContext::pcState().

◆ buildRetPC()

std::unique_ptr< PCStateBase > gem5::X86ISA::X86StaticInst::buildRetPC	(	const PCStateBase &	cur_pc,
		const PCStateBase &	call_pc
	)		const

inlineoverrideprotectedvirtual

Reimplemented from gem5::StaticInst.

Definition at line 218 of file static_inst.hh.

References gem5::PCStateBase::as(), and gem5::PCStateBase::clone().

◆ divideStep()

void gem5::X86ISA::X86StaticInst::divideStep	(	uint64_t	divident,
		uint64_t	divisor,
		uint64_t &	quotient,
		uint64_t &	remainder
	)

staticprotected

Definition at line 112 of file static_inst.cc.

References gem5::findMsbSet(), and gem5::ArmISA::shift.

◆ generateDisassembly()

std::string gem5::X86ISA::X86StaticInst::generateDisassembly	(	Addr	pc,
		const loader::SymbolTable *	symtab
	)		const

overrideprotectedvirtual

Internal function to generate disassembly string.

Implements gem5::StaticInst.

Definition at line 294 of file static_inst.cc.

References gem5::StaticInst::mnemonic, printMnemonic(), and gem5::ArmISA::ss.

◆ merge()

static uint64_t gem5::X86ISA::X86StaticInst::merge	(	uint64_t	into,
		RegIndex	index,
		uint64_t	val,
		int	size
	)

inlinestaticprotected

Definition at line 133 of file static_inst.hh.

References gem5::X86ISA::index, gem5::X86ISA::IntFoldBit, panic, gem5::X86ISA::reg, and gem5::X86ISA::val.

◆ pick()

static uint64_t gem5::X86ISA::X86StaticInst::pick	(	uint64_t	from,
		RegIndex	index,
		int	size
	)

inlinestaticprotected

Definition at line 162 of file static_inst.hh.

References DPRINTF, gem5::X86ISA::index, gem5::X86ISA::IntFoldBit, panic, and gem5::X86ISA::reg.

◆ printMem()

void gem5::X86ISA::X86StaticInst::printMem	(	std::ostream &	os,
		uint8_t	segment,
		uint8_t	scale,
		RegIndex	index,
		RegIndex	base,
		uint64_t	disp,
		uint8_t	addressSize,
		bool	rip
	)

static

Definition at line 258 of file static_inst.cc.

References gem5::X86ISA::base, gem5::ccprintf(), gem5::X86ISA::index, gem5::X86ISA::intRegClass, gem5::MipsISA::int_reg::NumRegs, gem5::X86ISA::os, printReg(), printSegment(), and gem5::X86ISA::scale.

Referenced by gem5::X86ISA::AddrOp::print().

◆ printMnemonic() [1/2]

void gem5::X86ISA::X86StaticInst::printMnemonic	(	std::ostream &	os,
		const char *	instMnemonic,
		const char *	mnemonic
	)

static

Definition at line 57 of file static_inst.cc.

References gem5::ccprintf(), gem5::StaticInst::mnemonic, and gem5::X86ISA::os.

◆ printMnemonic() [2/2]

void gem5::X86ISA::X86StaticInst::printMnemonic	(	std::ostream &	os,
		const char *	mnemonic
	)

static

Definition at line 51 of file static_inst.cc.

References gem5::ccprintf(), gem5::StaticInst::mnemonic, and gem5::X86ISA::os.

Referenced by gem5::X86ISA::MicroDebug::generateDisassembly(), and generateDisassembly().

◆ printReg()

void gem5::X86ISA::X86StaticInst::printReg	(	std::ostream &	os,
		RegId	reg,
		int	size
	)

static

Definition at line 142 of file static_inst.cc.

Referenced by gem5::X86ISA::IntOp< Base >::print(), gem5::X86ISA::FoldedOp< Base >::print(), gem5::X86ISA::MiscOp< Base >::print(), gem5::X86ISA::FloatOp< Base >::print(), and printMem().

◆ printSegment()

void gem5::X86ISA::X86StaticInst::printSegment	(	std::ostream &	os,
		int	segment
	)

static

◆ signedPick()

static int64_t gem5::X86ISA::X86StaticInst::signedPick	(	uint64_t	from,
		RegIndex	index,
		int	size
	)

inlinestaticprotected

Definition at line 183 of file static_inst.hh.

References DPRINTF, gem5::X86ISA::index, gem5::X86ISA::IntFoldBit, panic, and gem5::X86ISA::reg.

Member Data Documentation

◆ machInst

ExtMachInst gem5::X86ISA::X86StaticInst::machInst

Definition at line 118 of file static_inst.hh.

Referenced by gem5::X86ISA::X86MicroopBase::branchTarget(), and gem5::X86ISA::MacroopBase::getExtMachInst().

The documentation for this class was generated from the following files:

arch/x86/insts/static_inst.hh
arch/x86/insts/static_inst.cc

Static Public Member Functions

Public Attributes

Protected Types

Protected Member Functions

Static Protected Member Functions

Additional Inherited Members

Detailed Description

Member Typedef Documentation

◆ ExtMachInst

Constructor & Destructor Documentation

◆ X86StaticInst()

Member Function Documentation

◆ advancePC() [1/2]

◆ advancePC() [2/2]

◆ buildRetPC()

◆ divideStep()

◆ generateDisassembly()

◆ merge()

◆ pick()

◆ printMem()

◆ printMnemonic() [1/2]

◆ printMnemonic() [2/2]

◆ printReg()

◆ printSegment()

◆ signedPick()

Member Data Documentation

◆ machInst