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34 #include "debug/RubyNetwork.hh"
48 :
Consumer(router), m_router(router), m_num_vcs(m_router->get_num_vcs()),
49 m_crossbar_activity(0), switchBuffers(0)
68 DPRINTF(RubyNetwork,
"CrossbarSwitch at Router %d woke up "
73 if (!switch_buffer.isReady(
curTick())) {
77 flit *t_flit = switch_buffer.peekTopFlit();
88 switch_buffer.getTopFlit();
99 if (switch_buffer.functionalRead(pkt,
mask))
108 uint32_t num_functional_writes = 0;
111 num_functional_writes += switch_buffer.functionalWrite(pkt);
114 return num_functional_writes;
Tick curTick()
The universal simulation clock.
bool is_stage(flit_stage stage, Tick time)
Cycles curCycle() const
Determine the current cycle, corresponding to a tick aligned to a clock edge.
std::vector< flitBuffer > switchBuffers
void insert_flit(flit *t_flit)
constexpr uint64_t mask(unsigned nbits)
Generate a 64-bit mask of 'nbits' 1s, right justified.
Cycles is a wrapper class for representing cycle counts, i.e.
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
uint32_t functionalWrite(Packet *pkt)
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
void advance_stage(flit_stage t_stage, Tick newTime)
CrossbarSwitch(Router *router)
double m_crossbar_activity
OutputUnit * getOutputUnit(unsigned port)
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
bool functionalRead(Packet *pkt, WriteMask &mask)
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