se_workload.cc

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#include "arch/mips/se_workload.hh"
 
namespace gem5
{
 
namespace MipsISA
{
 
const std::vector<RegId> SEWorkload::SyscallABI::ArgumentRegs = {
    int_reg::A0, int_reg::A1, int_reg::A2,
    int_reg::A3, int_reg::T0, int_reg::T1
};
 
} // namespace MipsISA
} // namespace gem5