gem5  [DEVELOP-FOR-23.0]
All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Modules Pages
faults.cc
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2021 IBM Corporation
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are
7  * met: redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer;
9  * redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution;
12  * neither the name of the copyright holders nor the names of its
13  * contributors may be used to endorse or promote products derived from
14  * this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include "arch/power/faults.hh"
30 
31 #include <csignal>
32 
33 #include "cpu/base.hh"
34 #include "cpu/thread_context.hh"
35 
36 namespace gem5
37 {
38 
39 namespace PowerISA
40 {
41 
42 void
44 {
45  panic_if(tc->getSystemPtr()->trapToGdb(GDBSignal::ILL, tc->contextId()),
46  "Unimplemented opcode encountered at virtual address %#x\n",
47  tc->pcState().instAddr());
48 }
49 
50 void
52 {
53  panic_if(!tc->getSystemPtr()->trapToGdb(GDBSignal::BUS, tc->contextId()),
54  "Alignment fault when accessing virtual address %#x\n", vaddr);
55 }
56 
57 void
59 {
60  panic_if(tc->getSystemPtr()->trapToGdb(GDBSignal::TRAP, tc->contextId()),
61  "Trap encountered at virtual address %#x\n",
62  tc->pcState().instAddr());
63 }
64 
65 } // namespace PowerISA
66 
67 } // namespace gem5
gem5::PCStateBase::instAddr
Addr instAddr() const
Returns the memory address of the instruction this PC points to.
Definition: pcstate.hh:107
gem5::ThreadContext::getSystemPtr
virtual System * getSystemPtr()=0
gem5::ThreadContext::pcState
virtual const PCStateBase & pcState() const =0
gem5::System::trapToGdb
bool trapToGdb(GDBSignal signal, ContextID ctx_id) const
Definition: system.cc:394
gem5::ThreadContext::contextId
virtual ContextID contextId() const =0
gem5::RefCountingPtr< StaticInst >
faults.hh
gem5::PowerISA::AlignmentFault::vaddr
Addr vaddr
Definition: faults.hh:85
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
gem5::PowerISA::UnimplementedOpcodeFault::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition: faults.cc:43
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:214
base.hh
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::PowerISA::AlignmentFault::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition: faults.cc:51
thread_context.hh
gem5::PowerISA::TrapFault::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition: faults.cc:58

Generated on Sun Jul 30 2023 01:56:46 for gem5 by doxygen 1.8.17