gem5
[DEVELOP-FOR-23.0]
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#include <interrupt_handler.hh>
Classes | |
class | DmaEvent |
struct | SenderState |
Public Member Functions | |
AMDGPUInterruptHandler (const AMDGPUInterruptHandlerParams &p) | |
Tick | write (PacketPtr pkt) override |
Pure virtual function that the device must implement. More... | |
Tick | read (PacketPtr pkt) override |
Pure virtual function that the device must implement. More... | |
AddrRangeList | getAddrRanges () const override |
Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to. More... | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
void | setGPUDevice (AMDGPUDevice *gpu_device) |
void | prepareInterruptCookie (ContextID cntxtId, uint32_t ring_id, uint32_t client_id, uint32_t source_id) |
void | submitInterruptCookie () |
void | submitWritePointer () |
void | intrPost () |
void | writeMMIO (PacketPtr pkt, Addr mmio_offset) |
Methods for setting the values of interrupt handler MMIO registers. More... | |
uint32_t | getDoorbellOffset () const |
void | setCntl (const uint32_t &data) |
void | setBase (const uint32_t &data) |
void | setBaseHi (const uint32_t &data) |
void | setRptr (const uint32_t &data) |
void | setWptr (const uint32_t &data) |
void | setWptrAddrLo (const uint32_t &data) |
void | setWptrAddrHi (const uint32_t &data) |
void | setDoorbellOffset (const uint32_t &data) |
void | updateRptr (const uint32_t &data) |
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DmaDevice (const Params &p) | |
virtual | ~DmaDevice ()=default |
void | dmaWrite (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0) |
void | dmaWrite (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0) |
void | dmaRead (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0) |
void | dmaRead (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0) |
bool | dmaPending () const |
void | init () override |
init() is called after all C++ SimObjects have been created and all ports are connected. More... | |
unsigned int | cacheBlockSize () const |
Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
Get a port with a given name and index. More... | |
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PioDevice (const Params &p) | |
virtual | ~PioDevice () |
void | init () override |
init() is called after all C++ SimObjects have been created and all ports are connected. More... | |
Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
Get a port with a given name and index. More... | |
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ClockedObject (const ClockedObjectParams &p) | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
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const Params & | params () const |
SimObject (const Params &p) | |
virtual | ~SimObject () |
virtual void | loadState (CheckpointIn &cp) |
loadState() is called on each SimObject when restoring from a checkpoint. More... | |
virtual void | initState () |
initState() is called on each SimObject when not restoring from a checkpoint. More... | |
virtual void | regProbePoints () |
Register probe points for this object. More... | |
virtual void | regProbeListeners () |
Register probe listeners for this object. More... | |
ProbeManager * | getProbeManager () |
Get the probe manager for this object. More... | |
virtual void | startup () |
startup() is the final initialization call before simulation. More... | |
DrainState | drain () override |
Provide a default implementation of the drain interface for objects that don't need draining. More... | |
virtual void | memWriteback () |
Write back dirty buffers to memory using functional writes. More... | |
virtual void | memInvalidate () |
Invalidate the contents of memory buffers. More... | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
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EventQueue * | eventQueue () const |
void | schedule (Event &event, Tick when) |
void | deschedule (Event &event) |
void | reschedule (Event &event, Tick when, bool always=false) |
void | schedule (Event *event, Tick when) |
void | deschedule (Event *event) |
void | reschedule (Event *event, Tick when, bool always=false) |
void | wakeupEventQueue (Tick when=(Tick) -1) |
This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More... | |
void | setCurTick (Tick newVal) |
EventManager (EventManager &em) | |
Event manger manages events in the event queue. More... | |
EventManager (EventManager *em) | |
EventManager (EventQueue *eq) | |
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Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. More... | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. More... | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
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DrainState | drainState () const |
Return the current drain state of an object. More... | |
virtual void | notifyFork () |
Notify a child process of a fork. More... | |
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Group (Group *parent, const char *name=nullptr) | |
Construct a new statistics group. More... | |
virtual | ~Group () |
virtual void | regStats () |
Callback to set stat parameters. More... | |
virtual void | resetStats () |
Callback to reset stats. More... | |
virtual void | preDumpStats () |
Callback before stats are dumped. More... | |
void | addStat (statistics::Info *info) |
Register a stat with this group. More... | |
const std::map< std::string, Group * > & | getStatGroups () const |
Get all child groups associated with this object. More... | |
const std::vector< Info * > & | getStats () const |
Get all stats associated with this object. More... | |
void | addStatGroup (const char *name, Group *block) |
Add a stat block as a child of this block. More... | |
const Info * | resolveStat (std::string name) const |
Resolve a stat by its name within this group. More... | |
void | mergeStatGroup (Group *block) |
Merge the contents (stats & children) of a block to this block. More... | |
Group ()=delete | |
Group (const Group &)=delete | |
Group & | operator= (const Group &)=delete |
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Named (const std::string &name_) | |
virtual | ~Named ()=default |
virtual std::string | name () const |
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void | updateClockPeriod () |
Update the tick to the current tick. More... | |
Tick | clockEdge (Cycles cycles=Cycles(0)) const |
Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More... | |
Cycles | curCycle () const |
Determine the current cycle, corresponding to a tick aligned to a clock edge. More... | |
Tick | nextCycle () const |
Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More... | |
uint64_t | frequency () const |
Tick | clockPeriod () const |
double | voltage () const |
Cycles | ticksToCycles (Tick t) const |
Tick | cyclesToTicks (Cycles c) const |
Private Attributes | |
AMDGPUDevice * | gpuDevice |
AMDGPUIHRegs | regs |
std::queue< AMDGPUInterruptCookie * > | interruptQueue |
AMDGPUInterruptHandler::DmaEvent * | dmaEvent |
Additional Inherited Members | |
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typedef DmaDeviceParams | Params |
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using | Params = PioDeviceParams |
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using | Params = ClockedObjectParams |
Parameters of ClockedObject. More... | |
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typedef SimObjectParams | Params |
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static void | serializeAll (const std::string &cpt_dir) |
Create a checkpoint by serializing all SimObjects in the system. More... | |
static SimObject * | find (const char *name) |
Find the SimObject with the given name and return a pointer to it. More... | |
static void | setSimObjectResolver (SimObjectResolver *resolver) |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More... | |
static SimObjectResolver * | getSimObjectResolver () |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More... | |
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static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. More... | |
static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
Generate a checkpoint file so that the serialization can be routed to it. More... | |
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PowerState * | powerState |
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Drainable () | |
virtual | ~Drainable () |
virtual void | drainResume () |
Resume execution after a successful drain. More... | |
void | signalDrainDone () const |
Signal that an object is drained. More... | |
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Clocked (ClockDomain &clk_domain) | |
Create a clocked object and set the clock domain based on the parameters. More... | |
Clocked (Clocked &)=delete | |
Clocked & | operator= (Clocked &)=delete |
virtual | ~Clocked () |
Virtual destructor due to inheritance. More... | |
void | resetClock () const |
Reset the object's clock using the current global tick value. More... | |
virtual void | clockPeriodUpdated () |
A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More... | |
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DmaPort | dmaPort |
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System * | sys |
PioPort< PioDevice > | pioPort |
The pioPort that handles the requests for us and provides us requests that it sees. More... | |
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const SimObjectParams & | _params |
Cached copy of the object parameters. More... | |
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EventQueue * | eventq |
A pointer to this object's event queue. More... | |
Definition at line 130 of file interrupt_handler.hh.
gem5::AMDGPUInterruptHandler::AMDGPUInterruptHandler | ( | const AMDGPUInterruptHandlerParams & | p | ) |
Definition at line 53 of file interrupt_handler.cc.
References regs.
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overridevirtual |
Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to.
Implements gem5::PioDevice.
Definition at line 61 of file interrupt_handler.cc.
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inline |
Definition at line 184 of file interrupt_handler.hh.
References gem5::AMDGPUIHRegs::IH_Doorbell, and regs.
Referenced by writeMMIO().
void gem5::AMDGPUInterruptHandler::intrPost | ( | ) |
Definition at line 68 of file interrupt_handler.cc.
References gpuDevice, and gem5::AMDGPUDevice::intrPost().
Referenced by gem5::AMDGPUInterruptHandler::DmaEvent::process().
void gem5::AMDGPUInterruptHandler::prepareInterruptCookie | ( | ContextID | cntxtId, |
uint32_t | ring_id, | ||
uint32_t | client_id, | ||
uint32_t | source_id | ||
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Setup the fields in the interrupt cookie (see header file for more detail on the fields). The timestamp here is a bogus value. It seems the driver does not really care what this value is. Additionally the model does not currently have anything to keep track of time. It is possible that tick/cycle count can be used in the future if this ends up being important. The remaining fields are passed from whichever block is sending the interrupt.
Definition at line 75 of file interrupt_handler.cc.
References gem5::AMDGPUInterruptCookie::clientId, gem5::CP_EOP, interruptQueue, gem5::AMDGPUInterruptCookie::pasid, gem5::AMDGPUInterruptCookie::ringId, gem5::SOC15_IH_CLIENTID_GRBM_CP, gem5::SOC15_IH_CLIENTID_RLC, gem5::SOC15_IH_CLIENTID_SDMA0, gem5::SOC15_IH_CLIENTID_SDMA1, gem5::SOC15_IH_CLIENTID_SDMA2, gem5::SOC15_IH_CLIENTID_SDMA3, gem5::SOC15_IH_CLIENTID_SDMA4, gem5::SOC15_IH_CLIENTID_SDMA5, gem5::SOC15_IH_CLIENTID_SDMA6, gem5::SOC15_IH_CLIENTID_SDMA7, gem5::AMDGPUInterruptCookie::source_data_dw1, gem5::AMDGPUInterruptCookie::sourceId, gem5::AMDGPUInterruptCookie::timestamp_Lo, and gem5::TRAP_ID.
Referenced by gem5::PM4PacketProcessor::releaseMemDone(), and gem5::SDMAEngine::trap().
Pure virtual function that the device must implement.
Called when a read command is recieved by the port.
pkt | Packet describing this request |
Implements gem5::PioDevice.
Definition at line 167 of file interrupt_handler.hh.
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overridevirtual |
Serialize an object.
Output an object's state into the current checkpoint section.
cp | Checkpoint state |
Implements gem5::Serializable.
Definition at line 260 of file interrupt_handler.cc.
References gem5::AMDGPUIHRegs::baseAddr, gem5::AMDGPUIHRegs::IH_Base, gem5::AMDGPUIHRegs::IH_Base_Hi, gem5::AMDGPUIHRegs::IH_Cntl, gem5::AMDGPUIHRegs::IH_Doorbell, gem5::AMDGPUIHRegs::IH_Rptr, gem5::AMDGPUIHRegs::IH_Wptr, gem5::AMDGPUIHRegs::IH_Wptr_Addr_Hi, gem5::AMDGPUIHRegs::IH_Wptr_Addr_Lo, regs, SERIALIZE_SCALAR, and gem5::AMDGPUIHRegs::WptrAddr.
void gem5::AMDGPUInterruptHandler::setBase | ( | const uint32_t & | data | ) |
Definition at line 209 of file interrupt_handler.cc.
References gem5::AMDGPUIHRegs::baseAddr, data, and regs.
Referenced by writeMMIO().
void gem5::AMDGPUInterruptHandler::setBaseHi | ( | const uint32_t & | data | ) |
Definition at line 216 of file interrupt_handler.cc.
References gem5::AMDGPUIHRegs::baseAddr, data, and regs.
Referenced by writeMMIO().
void gem5::AMDGPUInterruptHandler::setCntl | ( | const uint32_t & | data | ) |
Definition at line 203 of file interrupt_handler.cc.
References data, gem5::AMDGPUIHRegs::IH_Cntl, and regs.
Referenced by writeMMIO().
void gem5::AMDGPUInterruptHandler::setDoorbellOffset | ( | const uint32_t & | data | ) |
Definition at line 248 of file interrupt_handler.cc.
References data, gem5::AMDGPUIHRegs::IH_Doorbell, and regs.
Referenced by writeMMIO().
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inline |
Definition at line 172 of file interrupt_handler.hh.
References gpuDevice.
Referenced by gem5::AMDGPUDevice::AMDGPUDevice().
void gem5::AMDGPUInterruptHandler::setRptr | ( | const uint32_t & | data | ) |
Definition at line 222 of file interrupt_handler.cc.
References data, gem5::AMDGPUIHRegs::IH_Rptr, and regs.
Referenced by writeMMIO().
void gem5::AMDGPUInterruptHandler::setWptr | ( | const uint32_t & | data | ) |
Definition at line 228 of file interrupt_handler.cc.
References data, gem5::AMDGPUIHRegs::IH_Wptr, and regs.
Referenced by writeMMIO().
void gem5::AMDGPUInterruptHandler::setWptrAddrHi | ( | const uint32_t & | data | ) |
Definition at line 241 of file interrupt_handler.cc.
References data, gem5::AMDGPUIHRegs::IH_Wptr_Addr_Hi, regs, and gem5::AMDGPUIHRegs::WptrAddr.
Referenced by writeMMIO().
void gem5::AMDGPUInterruptHandler::setWptrAddrLo | ( | const uint32_t & | data | ) |
Definition at line 234 of file interrupt_handler.cc.
References data, gem5::AMDGPUIHRegs::IH_Wptr_Addr_Lo, regs, and gem5::AMDGPUIHRegs::WptrAddr.
Referenced by writeMMIO().
void gem5::AMDGPUInterruptHandler::submitInterruptCookie | ( | ) |
Definition at line 146 of file interrupt_handler.cc.
References gem5::AMDGPUIHRegs::baseAddr, dmaEvent, gem5::DmaDevice::dmaWrite(), DPRINTF, gem5::AMDGPUIHRegs::IH_Rptr, gem5::AMDGPUIHRegs::IH_Wptr, interruptQueue, and regs.
Referenced by gem5::PM4PacketProcessor::releaseMemDone(), and gem5::SDMAEngine::trap().
void gem5::AMDGPUInterruptHandler::submitWritePointer | ( | ) |
Definition at line 134 of file interrupt_handler.cc.
References dmaEvent, gem5::DmaDevice::dmaWrite(), gem5::AMDGPUIHRegs::IH_Wptr, regs, and gem5::AMDGPUIHRegs::WptrAddr.
Referenced by gem5::AMDGPUInterruptHandler::DmaEvent::process().
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overridevirtual |
Unserialize an object.
Read an object's state from the current checkpoint section.
cp | Checkpoint state |
Implements gem5::Serializable.
Definition at line 286 of file interrupt_handler.cc.
References gem5::AMDGPUIHRegs::baseAddr, gem5::AMDGPUIHRegs::IH_Base, gem5::AMDGPUIHRegs::IH_Base_Hi, gem5::AMDGPUIHRegs::IH_Cntl, gem5::AMDGPUIHRegs::IH_Doorbell, gem5::AMDGPUIHRegs::IH_Rptr, gem5::AMDGPUIHRegs::IH_Wptr, gem5::AMDGPUIHRegs::IH_Wptr_Addr_Hi, gem5::AMDGPUIHRegs::IH_Wptr_Addr_Lo, regs, UNSERIALIZE_SCALAR, and gem5::AMDGPUIHRegs::WptrAddr.
void gem5::AMDGPUInterruptHandler::updateRptr | ( | const uint32_t & | data | ) |
Definition at line 254 of file interrupt_handler.cc.
References data, gem5::AMDGPUIHRegs::IH_Rptr, and regs.
Referenced by gem5::AMDGPUDevice::writeDoorbell().
Pure virtual function that the device must implement.
Called when a write command is recieved by the port.
pkt | Packet describing this request |
Implements gem5::PioDevice.
Definition at line 166 of file interrupt_handler.hh.
Methods for setting the values of interrupt handler MMIO registers.
Definition at line 165 of file interrupt_handler.cc.
References gem5::bits(), DPRINTF, getDoorbellOffset(), gem5::Packet::getLE(), gpuDevice, gem5::InterruptHandler, mmIH_DOORBELL_RPTR, mmIH_RB_BASE, mmIH_RB_BASE_HI, mmIH_RB_CNTL, mmIH_RB_RPTR, mmIH_RB_WPTR, mmIH_RB_WPTR_ADDR_HI, mmIH_RB_WPTR_ADDR_LO, setBase(), setBaseHi(), setCntl(), setDoorbellOffset(), gem5::AMDGPUDevice::setDoorbellType(), setRptr(), setWptr(), setWptrAddrHi(), and setWptrAddrLo().
Referenced by gem5::AMDGPUDevice::writeMMIO().
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private |
Definition at line 199 of file interrupt_handler.hh.
Referenced by submitInterruptCookie(), and submitWritePointer().
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private |
Definition at line 196 of file interrupt_handler.hh.
Referenced by intrPost(), setGPUDevice(), and writeMMIO().
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private |
Definition at line 198 of file interrupt_handler.hh.
Referenced by prepareInterruptCookie(), and submitInterruptCookie().
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private |
Definition at line 197 of file interrupt_handler.hh.
Referenced by AMDGPUInterruptHandler(), getDoorbellOffset(), serialize(), setBase(), setBaseHi(), setCntl(), setDoorbellOffset(), setRptr(), setWptr(), setWptrAddrHi(), setWptrAddrLo(), submitInterruptCookie(), submitWritePointer(), unserialize(), and updateRptr().